kc3-lang/angle/src/compiler/translator/tree_ops/msl/RewriteCaseDeclarations.cpp

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• Hash : f7de39b6
  Author :
  Date : 2024-03-09T10:27:47
  

  Make IntermRebuild available for all backends
  
  Move IntermRebuild from MSL to general translator
  code.
  
  Bug: angleproject:8590
  Change-Id: Ie14651d09fbc320b27b94e48eb12d4ca8c79c68c
  Reviewed-on: https://chromium-review.googlesource.com/c/angle/angle/+/5358815
  Reviewed-by: Shahbaz Youssefi <syoussefi@chromium.org>
  Auto-Submit: Kimmo Kinnunen <kkinnunen@apple.com>
  Commit-Queue: Kimmo Kinnunen <kkinnunen@apple.com>
  

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• src/compiler/translator/tree_ops/msl/RewriteCaseDeclarations.cpp

• //
  // Copyright 2020 The ANGLE Project Authors. All rights reserved.
  // Use of this source code is governed by a BSD-style license that can be
  // found in the LICENSE file.
  //
  
  #include "compiler/translator/tree_ops/msl/RewriteCaseDeclarations.h"
  #include "compiler/translator/IntermRebuild.h"
  #include "compiler/translator/util.h"
  
  using namespace sh;
  
  ////////////////////////////////////////////////////////////////////////////////
  
  namespace
  {
  
  class Rewriter : public TIntermRebuild
  {
      std::vector<std::vector<const TVariable *>> mDeclaredVarStack;
  
    public:
      Rewriter(TCompiler &compiler) : TIntermRebuild(compiler, true, true) {}
  
      ~Rewriter() override { ASSERT(mDeclaredVarStack.empty()); }
  
    private:
      PreResult visitSwitchPre(TIntermSwitch &node) override
      {
          mDeclaredVarStack.emplace_back();
          return node;
      }
  
      PostResult visitSwitchPost(TIntermSwitch &node) override
      {
          ASSERT(!mDeclaredVarStack.empty());
          const auto vars = std::move(mDeclaredVarStack.back());
          mDeclaredVarStack.pop_back();
          if (!vars.empty())
          {
              auto &block = *new TIntermBlock();
              for (const TVariable *var : vars)
              {
                  block.appendStatement(new TIntermDeclaration{var});
              }
              block.appendStatement(&node);
              return block;
          }
          return node;
      }
  
      PreResult visitDeclarationPre(TIntermDeclaration &node) override
      {
          if (!mDeclaredVarStack.empty())
          {
              TIntermNode *parent = getParentNode();
              if (parent->getAsBlock())
              {
                  TIntermNode *grandparent = getParentNode(1);
                  if (grandparent && grandparent->getAsSwitchNode())
                  {
                      Declaration decl = ViewDeclaration(node);
                      mDeclaredVarStack.back().push_back(&decl.symbol.variable());
                      if (decl.initExpr)
                      {
                          return *new TIntermBinary(TOperator::EOpAssign, &decl.symbol,
                                                    decl.initExpr);
                      }
                      else
                      {
                          return nullptr;
                      }
                  }
              }
          }
          return node;
      }
  };
  
  }  // anonymous namespace
  
  ////////////////////////////////////////////////////////////////////////////////
  
  bool sh::RewriteCaseDeclarations(TCompiler &compiler, TIntermBlock &root)
  {
      if (!Rewriter(compiler).rebuildRoot(root))
      {
          return false;
      }
      return true;
  }
  

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