kc3-lang/libjpeg-turbo/simd/i386/jcphuff-sse2.asm
Branch
-
Show log
Commit
-
Hash : 5e27ca23
Author :
Date : 2025-09-19T14:21:49
x86: Reformat NASM code to improve readability (and simplify the checkstyle script)
-
simd/i386/jcphuff-sse2.asm
-
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657
; ; Prepare data for progressive Huffman encoding (32-bit SSE2) ; ; Copyright (C) 2016, 2018, Matthieu Darbois ; Copyright (C) 2025, D. R. Commander. ; ; Based on the x86 SIMD extension for IJG JPEG library ; Copyright (C) 1999-2006, MIYASAKA Masaru. ; For conditions of distribution and use, see copyright notice in jsimdext.inc ; ; This file should be assembled with NASM (Netwide Assembler) or Yasm. ; ; This file contains an SSE2 implementation of data preparation for progressive ; Huffman encoding. See jcphuff.c for more details. %include "jsimdext.inc" ; -------------------------------------------------------------------------- SECTION SEG_TEXT BITS 32 ; -------------------------------------------------------------------------- ; Macros to load data for jsimd_encode_mcu_AC_first_prepare_sse2() and ; jsimd_encode_mcu_AC_refine_prepare_sse2() %macro LOAD16 0 pxor N0, N0 pxor N1, N1 mov T0, INT [LUT + 0 * SIZEOF_INT] mov T1, INT [LUT + 8 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 0 pinsrw X1, word [BLOCK + T1 * 2], 0 mov T0, INT [LUT + 1 * SIZEOF_INT] mov T1, INT [LUT + 9 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 1 pinsrw X1, word [BLOCK + T1 * 2], 1 mov T0, INT [LUT + 2 * SIZEOF_INT] mov T1, INT [LUT + 10 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 2 pinsrw X1, word [BLOCK + T1 * 2], 2 mov T0, INT [LUT + 3 * SIZEOF_INT] mov T1, INT [LUT + 11 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 3 pinsrw X1, word [BLOCK + T1 * 2], 3 mov T0, INT [LUT + 4 * SIZEOF_INT] mov T1, INT [LUT + 12 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 4 pinsrw X1, word [BLOCK + T1 * 2], 4 mov T0, INT [LUT + 5 * SIZEOF_INT] mov T1, INT [LUT + 13 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 5 pinsrw X1, word [BLOCK + T1 * 2], 5 mov T0, INT [LUT + 6 * SIZEOF_INT] mov T1, INT [LUT + 14 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 6 pinsrw X1, word [BLOCK + T1 * 2], 6 mov T0, INT [LUT + 7 * SIZEOF_INT] mov T1, INT [LUT + 15 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 7 pinsrw X1, word [BLOCK + T1 * 2], 7 %endmacro %macro LOAD15 0 pxor N0, N0 pxor N1, N1 pxor X1, X1 mov T0, INT [LUT + 0 * SIZEOF_INT] mov T1, INT [LUT + 8 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 0 pinsrw X1, word [BLOCK + T1 * 2], 0 mov T0, INT [LUT + 1 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 1 mov T0, INT [LUT + 2 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 2 mov T0, INT [LUT + 3 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 3 mov T0, INT [LUT + 4 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 4 mov T0, INT [LUT + 5 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 5 mov T0, INT [LUT + 6 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 6 mov T0, INT [LUT + 7 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 7 cmp LENEND, 2 jl %%.ELOAD15 mov T1, INT [LUT + 9 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 1 cmp LENEND, 3 jl %%.ELOAD15 mov T1, INT [LUT + 10 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 2 cmp LENEND, 4 jl %%.ELOAD15 mov T1, INT [LUT + 11 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 3 cmp LENEND, 5 jl %%.ELOAD15 mov T1, INT [LUT + 12 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 4 cmp LENEND, 6 jl %%.ELOAD15 mov T1, INT [LUT + 13 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 5 cmp LENEND, 7 jl %%.ELOAD15 mov T1, INT [LUT + 14 * SIZEOF_INT] pinsrw X1, word [BLOCK + T1 * 2], 6 %%.ELOAD15: %endmacro %macro LOAD8 0 pxor N0, N0 mov T0, INT [LUT + 0 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 0 mov T0, INT [LUT + 1 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 1 mov T0, INT [LUT + 2 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 2 mov T0, INT [LUT + 3 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 3 mov T0, INT [LUT + 4 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 4 mov T0, INT [LUT + 5 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 5 mov T0, INT [LUT + 6 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 6 mov T0, INT [LUT + 7 * SIZEOF_INT] pinsrw X0, word [BLOCK + T0 * 2], 7 %endmacro %macro LOAD7 0 pxor N0, N0 pxor X0, X0 mov T1, INT [LUT + 0 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 0 cmp LENEND, 2 jl %%.ELOAD7 mov T1, INT [LUT + 1 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 1 cmp LENEND, 3 jl %%.ELOAD7 mov T1, INT [LUT + 2 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 2 cmp LENEND, 4 jl %%.ELOAD7 mov T1, INT [LUT + 3 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 3 cmp LENEND, 5 jl %%.ELOAD7 mov T1, INT [LUT + 4 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 4 cmp LENEND, 6 jl %%.ELOAD7 mov T1, INT [LUT + 5 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 5 cmp LENEND, 7 jl %%.ELOAD7 mov T1, INT [LUT + 6 * SIZEOF_INT] pinsrw X0, word [BLOCK + T1 * 2], 6 %%.ELOAD7: %endmacro %macro REDUCE0 0 movdqa xmm0, XMMWORD [VALUES + ( 0 * 2)] movdqa xmm1, XMMWORD [VALUES + ( 8 * 2)] movdqa xmm2, XMMWORD [VALUES + (16 * 2)] movdqa xmm3, XMMWORD [VALUES + (24 * 2)] movdqa xmm4, XMMWORD [VALUES + (32 * 2)] movdqa xmm5, XMMWORD [VALUES + (40 * 2)] movdqa xmm6, XMMWORD [VALUES + (48 * 2)] pcmpeqw xmm0, ZERO pcmpeqw xmm1, ZERO pcmpeqw xmm2, ZERO pcmpeqw xmm3, ZERO pcmpeqw xmm4, ZERO pcmpeqw xmm5, ZERO pcmpeqw xmm6, ZERO pcmpeqw xmm7, XMMWORD [VALUES + (56 * 2)] packsswb xmm0, xmm1 packsswb xmm2, xmm3 packsswb xmm4, xmm5 packsswb xmm6, xmm7 pmovmskb eax, xmm0 pmovmskb ecx, xmm2 pmovmskb edx, xmm4 pmovmskb esi, xmm6 shl ecx, 16 shl esi, 16 or eax, ecx or edx, esi not eax not edx mov edi, ZEROBITS mov INT [edi], eax mov INT [edi + SIZEOF_INT], edx %endmacro ; Prepare data for jsimd_encode_mcu_AC_first(). ; ; GLOBAL(void) ; jsimd_encode_mcu_AC_first_prepare_sse2(const JCOEF *block, ; const int *jpeg_natural_order_start, ; int Sl, int Al, JCOEF *values, ; size_t *zerobits) ; ; eax + 8 = const JCOEF *block ; eax + 12 = const int *jpeg_natural_order_start ; eax + 16 = int Sl ; eax + 20 = int Al ; eax + 24 = JCOEF *values ; eax + 28 = size_t *zerobits %define ZERO xmm7 %define X0 xmm0 %define X1 xmm1 %define N0 xmm2 %define N1 xmm3 %define AL xmm4 %define K eax %define LENEND eax %define LUT ebx %define T0 ecx %define T1 edx %define BLOCK esi %define VALUES edi %define LEN ebp %define ZEROBITS INT [esp + 5 * 4] align 32 GLOBAL_FUNCTION(jsimd_encode_mcu_AC_first_prepare_sse2) EXTN(jsimd_encode_mcu_AC_first_prepare_sse2): push ebp mov eax, esp ; eax = original ebp sub esp, byte 4 and esp, byte (-SIZEOF_XMMWORD) ; align to 128 bits mov [esp], eax mov ebp, esp ; ebp = aligned ebp sub esp, 4 push ebx push ecx ; push edx ; need not be preserved push esi push edi push ebp mov BLOCK, INT [eax + 8] mov LUT, INT [eax + 12] mov VALUES, INT [eax + 24] movd AL, INT [eax + 20] mov T0, INT [eax + 28] mov ZEROBITS, T0 mov LEN, INT [eax + 16] pxor ZERO, ZERO mov K, LEN and K, -16 shr K, 4 jz .ELOOP16 .BLOOP16: LOAD16 pcmpgtw N0, X0 pcmpgtw N1, X1 paddw X0, N0 paddw X1, N1 pxor X0, N0 pxor X1, N1 psrlw X0, AL psrlw X1, AL pxor N0, X0 pxor N1, X1 movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (8) * 2], X1 movdqa XMMWORD [VALUES + (0 + DCTSIZE2) * 2], N0 movdqa XMMWORD [VALUES + (8 + DCTSIZE2) * 2], N1 add VALUES, 16 * 2 add LUT, 16 * SIZEOF_INT dec K jnz .BLOOP16 test LEN, 15 je .PADDING .ELOOP16: mov LENEND, LEN and LENEND, 7 test LEN, 8 jz .TRY7 test LEN, 7 jz .TRY8 LOAD15 pcmpgtw N0, X0 pcmpgtw N1, X1 paddw X0, N0 paddw X1, N1 pxor X0, N0 pxor X1, N1 psrlw X0, AL psrlw X1, AL pxor N0, X0 pxor N1, X1 movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (8) * 2], X1 movdqa XMMWORD [VALUES + (0 + DCTSIZE2) * 2], N0 movdqa XMMWORD [VALUES + (8 + DCTSIZE2) * 2], N1 add VALUES, 16 * 2 jmp .PADDING .TRY8: LOAD8 pcmpgtw N0, X0 paddw X0, N0 pxor X0, N0 psrlw X0, AL pxor N0, X0 movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (0 + DCTSIZE2) * 2], N0 add VALUES, 8 * 2 jmp .PADDING .TRY7: LOAD7 pcmpgtw N0, X0 paddw X0, N0 pxor X0, N0 psrlw X0, AL pxor N0, X0 movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (0 + DCTSIZE2) * 2], N0 add VALUES, 8 * 2 .PADDING: mov K, LEN add K, 7 and K, -8 shr K, 3 sub K, DCTSIZE2 / 8 jz .EPADDING align 16 .ZEROLOOP: movdqa XMMWORD [VALUES + 0], ZERO add VALUES, 8 * 2 inc K jnz .ZEROLOOP .EPADDING: sub VALUES, DCTSIZE2 * 2 REDUCE0 pop ebp pop edi pop esi ; pop edx ; need not be preserved pop ecx pop ebx mov esp, ebp ; esp <- aligned ebp pop esp ; esp <- original ebp pop ebp ret %undef ZERO %undef X0 %undef X1 %undef N0 %undef N1 %undef AL %undef K %undef LUT %undef T0 %undef T1 %undef BLOCK %undef VALUES %undef LEN ; Prepare data for jsimd_encode_mcu_AC_refine(). ; ; GLOBAL(int) ; jsimd_encode_mcu_AC_refine_prepare_sse2(const JCOEF *block, ; const int *jpeg_natural_order_start, ; int Sl, int Al, JCOEF *absvalues, ; size_t *bits) ; ; eax + 8 = const JCOEF *block ; eax + 12 = const int *jpeg_natural_order_start ; eax + 16 = int Sl ; eax + 20 = int Al ; eax + 24 = JCOEF *values ; eax + 28 = size_t *bits %define ZERO xmm7 %define ONE xmm5 %define X0 xmm0 %define X1 xmm1 %define N0 xmm2 %define N1 xmm3 %define AL xmm4 %define K eax %define LENEND eax %define LUT ebx %define T0 ecx %define T0w cx %define T1 edx %define BLOCK esi %define VALUES edi %define KK ebp %define ZEROBITS INT [esp + 5 * 4] %define EOB INT [esp + 5 * 4 + 4] %define LEN INT [esp + 5 * 4 + 8] align 32 GLOBAL_FUNCTION(jsimd_encode_mcu_AC_refine_prepare_sse2) EXTN(jsimd_encode_mcu_AC_refine_prepare_sse2): push ebp mov eax, esp ; eax = original ebp sub esp, byte 4 and esp, byte (-SIZEOF_XMMWORD) ; align to 128 bits mov [esp], eax mov ebp, esp ; ebp = aligned ebp sub esp, 16 push ebx push ecx ; push edx ; need not be preserved push esi push edi push ebp pcmpeqw ONE, ONE psrlw ONE, 15 mov BLOCK, INT [eax + 8] mov LUT, INT [eax + 12] mov VALUES, INT [eax + 24] movd AL, INT [eax + 20] mov T0, INT [eax + 28] mov K, INT [eax + 16] mov INT [T0 + 2 * SIZEOF_INT], -1 mov INT [T0 + 3 * SIZEOF_INT], -1 mov ZEROBITS, T0 mov LEN, K pxor ZERO, ZERO and K, -16 mov EOB, 0 xor KK, KK shr K, 4 jz .ELOOPR16 .BLOOPR16: LOAD16 pcmpgtw N0, X0 pcmpgtw N1, X1 paddw X0, N0 paddw X1, N1 pxor X0, N0 pxor X1, N1 psrlw X0, AL psrlw X1, AL movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (8) * 2], X1 pcmpeqw X0, ONE pcmpeqw X1, ONE packsswb N0, N1 packsswb X0, X1 pmovmskb T0, N0 ; lsignbits.val16u[k >> 4] = _mm_movemask_epi8(neg); mov T1, ZEROBITS not T0 mov word [T1 + 2 * SIZEOF_INT + KK], T0w pmovmskb T1, X0 ; idx = _mm_movemask_epi8(x1); bsr T1, T1 ; idx = 16 - (__builtin_clz(idx) >> 1); jz .CONTINUER16 ; if (idx) { lea T1, [T1 + KK * 8] mov EOB, T1 ; EOB = k + idx; .CONTINUER16: add VALUES, 16 * 2 add LUT, 16 * SIZEOF_INT add KK, 2 dec K jnz .BLOOPR16 test LEN, 15 je .PADDINGR .ELOOPR16: mov LENEND, LEN test LENEND, 8 jz .TRYR7 test LENEND, 7 jz .TRYR8 and LENEND, 7 LOAD15 pcmpgtw N0, X0 pcmpgtw N1, X1 paddw X0, N0 paddw X1, N1 pxor X0, N0 pxor X1, N1 psrlw X0, AL psrlw X1, AL movdqa XMMWORD [VALUES + (0) * 2], X0 movdqa XMMWORD [VALUES + (8) * 2], X1 pcmpeqw X0, ONE pcmpeqw X1, ONE packsswb N0, N1 packsswb X0, X1 pmovmskb T0, N0 ; lsignbits.val16u[k >> 4] = _mm_movemask_epi8(neg); mov T1, ZEROBITS not T0 mov word [T1 + 2 * SIZEOF_INT + KK], T0w pmovmskb T1, X0 ; idx = _mm_movemask_epi8(x1); bsr T1, T1 ; idx = 16 - (__builtin_clz(idx) >> 1); jz .CONTINUER15 ; if (idx) { lea T1, [T1 + KK * 8] mov EOB, T1 ; EOB = k + idx; .CONTINUER15: add VALUES, 16 * 2 jmp .PADDINGR .TRYR8: LOAD8 pcmpgtw N0, X0 paddw X0, N0 pxor X0, N0 psrlw X0, AL movdqa XMMWORD [VALUES + (0) * 2], X0 pcmpeqw X0, ONE packsswb N0, ZERO packsswb X0, ZERO pmovmskb T0, N0 ; lsignbits.val16u[k >> 4] = _mm_movemask_epi8(neg); mov T1, ZEROBITS not T0 mov word [T1 + 2 * SIZEOF_INT + KK], T0w pmovmskb T1, X0 ; idx = _mm_movemask_epi8(x1); bsr T1, T1 ; idx = 16 - (__builtin_clz(idx) >> 1); jz .CONTINUER8 ; if (idx) { lea T1, [T1 + KK * 8] mov EOB, T1 ; EOB = k + idx; .CONTINUER8: add VALUES, 8 * 2 jmp .PADDINGR .TRYR7: and LENEND, 7 LOAD7 pcmpgtw N0, X0 paddw X0, N0 pxor X0, N0 psrlw X0, AL movdqa XMMWORD [VALUES + (0) * 2], X0 pcmpeqw X0, ONE packsswb N0, ZERO packsswb X0, ZERO pmovmskb T0, N0 ; lsignbits.val16u[k >> 4] = _mm_movemask_epi8(neg); mov T1, ZEROBITS not T0 mov word [T1 + 2 * SIZEOF_INT + KK], T0w pmovmskb T1, X0 ; idx = _mm_movemask_epi8(x1); bsr T1, T1 ; idx = 16 - (__builtin_clz(idx) >> 1); jz .CONTINUER7 ; if (idx) { lea T1, [T1 + KK * 8] mov EOB, T1 ; EOB = k + idx; .CONTINUER7: add VALUES, 8 * 2 .PADDINGR: mov K, LEN add K, 7 and K, -8 shr K, 3 sub K, DCTSIZE2 / 8 jz .EPADDINGR align 16 .ZEROLOOPR: movdqa XMMWORD [VALUES + 0], ZERO add VALUES, 8 * 2 inc K jnz .ZEROLOOPR .EPADDINGR: sub VALUES, DCTSIZE2 * 2 REDUCE0 mov eax, EOB pop ebp pop edi pop esi ; pop edx ; need not be preserved pop ecx pop ebx mov esp, ebp ; esp <- aligned ebp pop esp ; esp <- original ebp pop ebp ret %undef ZERO %undef ONE %undef X0 %undef X1 %undef N0 %undef N1 %undef AL %undef K %undef KK %undef EOB %undef SIGN %undef LUT %undef T0 %undef T1 %undef BLOCK %undef VALUES %undef LEN %undef LENEND ; For some reason, the OS X linker does not honor the request to align the ; segment unless we do this. align 32