Branch :
| Author | Commit | Date | CI | Message |
|---|---|---|---|---|
| 384eb285 | 2024-05-06 12:23:55 | bump REVISION for py3.10 -> py3.11 switch | ||
| e2cb14bf | 2023-02-15 15:30:58 | opensbi now needs python to build | ||
| d91d95e1 | 2023-02-08 13:04:27 | Update opensbi to 1.2 ok kevlo@ | ||
| 2b3700e3 | 2022-03-11 19:57:10 | drop RCS Ids | ||
| 39175ba2 | 2021-06-08 07:05:33 | install fw_dynamic.bin required for hifive unmatched u-boot | ||
| 65647d56 | 2021-05-15 10:31:44 | import OpenSBI 0.9 The RISC-V Supervisor Binary Interface (SBI) allows supervisor-mode software to be portable across all RISC-V implementations by defining an abstraction for platform (or hypervisor) specific functionality. See https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc for more information. OpenSBI provides an open-source reference implementation of the RISC-V SBI specifications which can be easily extended by RISC-V platform and system-on-chip vendors to fit a particular hardware configuration. feedback and ok sthen@ |