IABSD.fr/src/sys/arch
Branch :
Log
| Author | Commit | Date | CI | Message |
|---|---|---|---|---|
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d989f921 | 2025-02-26 23:05:17 | recognise Cortex-A320 (Arcadia) | |
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1e9ab3e3 | 2025-02-24 13:18:01 | reguster -> register | |
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8f64efa5 | 2025-02-19 21:33:10 | Add efi(4) such that we can use installboot -c in the installer. ok deraadt@, kn@ | |
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483a78e1 | 2025-02-19 18:25:03 | Add some more PPC_FEATURES2 defines From FreeBSD via Brad, ok kettenis@ | |
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181c8b93 | 2025-02-18 09:18:57 | Use the same system register alias trick as we have in cpu.c to make clang19 happy. ok patrick@ | |
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a11201ac | 2025-02-17 22:31:53 | Add support for device mappings in pmap_kenter_pa(9) the same way we handle those in pmap_enter(9). arm64 diff by kettenis@, ok kettenis@ | |
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ed913ab5 | 2025-02-17 21:08:40 | Fix pre-registration of wakeup interrupts. ok patrick@ | |
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c05afcd0 | 2025-02-17 13:28:26 | Disable pagefault handling when unwinding userland stack. When collecting userland stacktraces with dt(4), the probe may run in an interrupt routine at IPL_VM or higher. Resolving pagefaults in this case might result in panic or corrupt UVM data structures. Userland stack frames cannot be trusted, a bogus frame pointer may force us into a page fault. From Christian Ludwig, ok kettenis@ | |
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8d246409 | 2025-02-14 18:42:43 | It is important that we map memory with the right attributes otherwise we may trigger an SError. The crashlog entries for the SMC live in SRAM which needs to be mapped as device memory. To make this possible, make the rk_logmap() rtkit callback function return the desired memory attributes in the low bits of the address, using PMAP_NOCACHE or PMAP_DEVICE defines. Rewrite the DCP implementation of rk_logmap() to do a better job ati determining the correct mapping. The current code would fail in some cases (i.e. on the M1 Pro MacBook Pro) and map some unused address as normal non-cachable which could also trigger an SError. ok jca@ | |
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4a7354f2 | 2025-02-14 18:36:04 | Add support for device mappings in pmap_kenter_pa(9) the same way we handle those in pmap_enter(9). ok jca@ | |
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c33cf9b0 | 2025-02-14 04:56:26 | Enable mtrng(4). ok kettenis@ | |
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eb8501b6 | 2025-02-12 20:18:31 | Fix ddb machine sysregs stack overflow. In 64-bit mode, the operand size of SIDT and SGDT instructions is 8+2 bytes. On amd64 ddb command 'machine sysregs' reserved only int64_t, resulting in a stack overflow. Use struct region_descriptor which has the correct memory layout for IDTR and GDTR. Allow to call db_sysregs_cmd() also with single processor kernel. from Sebastian Sturm; OK deraadt@ miod@ | |
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705b70e0 | 2025-02-11 22:27:09 | Implement support for SVE (Scalable Vector Extension) on arm64. ok patrick@ | |
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ebbd7b19 | 2025-02-10 20:40:26 | Fix pasto. Spotted by FUKAUMI Naoki. | |
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719e8131 | 2025-02-10 11:41:19 | Although one would expect systems emulating the legacy PS/2 keyboard controller to do this faithfully, there are more and more systems which use creative interrupt configurations differing from the ISA defaults, and cause pckbc@isa to not behave correctly, making these keyboards (and sometimes trackpads, too) unusable. This commit introduces a pckbc@acpi attachment, which will attach instead of pckbc@isa if it detects an interrupt configuration which would not be handled correctly by the isa attachment. This unbreaks, among other things, the keyboards in various ChromeBook. ok kettenis@, thanks to everyone who tested. | |
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3b1132f5 | 2025-02-07 22:05:15 | Print RAS and SVE CPU features. ok tb@, mglocker@ | |
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d3bc0aaa | 2025-02-07 13:37:11 | whitespace | |
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4a32f16c | 2025-02-07 03:03:08 | update drm to linux 6.12.12 new hardware support includes: Intel Arrow Lake (ARL) AMD GC 11.5.0, DCN 3.5.0, APU, Ryzen AI 300, Strix Point GC 11.5.1, DCN 3.5.1, APU GC 11.5.2, DCN 3.5.1, APU GC 12.0.0, DCN 4.0.1, dGPU GC 12.0.1, DCN 4.0.1, dGPU Thanks to the OpenBSD Foundation for sponsoring this work. | |
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74f9cb9d | 2025-02-03 17:59:40 | Drop unused PTED_VA_EXEC_M Leftover from the powerpc pmap code, ok kettenis@ | |
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dc822df2 | 2025-02-02 13:36:09 | The SpecSEI feature can vary between CPU cores. This isn't really a problem so avoid warning about it. ok patrick@ | |
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bb8b8ec7 | 2025-02-02 11:21:45 | Enable PAC on hardware that uses the new QARMA3 cipher. ok patrick@ | |
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7201456b | 2025-02-02 05:45:20 | Fix spelling/grammar in previous commit | |
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6be233ad | 2025-02-02 05:41:16 | Work around a regression in llvm/clang-19 that miscalculates an expression in a .space directive by hardcoding the current, correct value. Include a long comment explaining how, if things change, the Makefile has a check to prevent catch the incorrect layout and how to find the correct value to use. Problem reported by tb@ | |
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56309235 | 2025-01-31 20:49:25 | Optimize pmap teardown by skipping TLB flushes. Instead disable the userland mappings as soon as threads exit and flush all TLB entries for the ASIDs used by the pmap when the last thread that uses the pmap exits. Gives roughly 5% of performance boost doing a kernel build. ok mpi@ | |
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e0513a87 | 2025-01-31 16:46:41 | Explicitly initialize initialize CNTKCTL_EL1 to a known state. Some of these bits are architecturally UNKNOWN and other bits might be initialized to different values than the documented defaults by the firmware. Based on a commit from Jared McNeill in NetBSD. ok patrick@ | |
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b42b1d52 | 2025-01-31 16:42:26 | Explicitly initialize CNTHCTL_EL2 to a know state. Some of these bits are architecturally UNKNOWN and other bits might be initialized to different values than the documented defaults by the firmware. Based on a diff from Jared McNeill in NetBSD. ok patrick@ (and some input from lucas@) | |
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14cebf10 | 2025-01-30 21:46:25 | Remove unnecessary AFLAGS+= -Wa,-Av9a. This is gcc's default. Confirmed no binary change as well. ok kettenis@ | |
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394160b5 | 2025-01-30 07:32:04 | Enable mtintc(4), a driver for the interrupt controller on MediaTek SoCs. ok kettenis@ | |
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ce9bdfd1 | 2025-01-29 22:50:16 | If there is no SPCR table, or if it didn't provide us with a usuable serial console, fall back on parsing the DBG2 table. If we find a usable serial port there don't make it the console by default since there is a decent chance that the port isn't easily accessable. But this allows the user to use the port as serial console by entering "set tty com0" on at the bootloader prompt. ok patrick@ | |
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6f6231dc | 2025-01-25 12:29:35 | Improve the way we print the PAC feature flag to catch up with new versions of the architecture. Add decoding for APA3 such that we can tell that newer ARM cores support PAC. ok jsg@ | |
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53f700b0 | 2025-01-24 20:17:28 | Add support for multiple redistributor regions. ok patrick@ | |
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eb3d9e2d | 2025-01-23 11:24:34 | Handle the case of multiple MCFG table entries for a single segment by checking that the bus number falls within the range of the MCFG entry. ok patrick@ | |
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65d2f155 | 2025-01-22 18:18:58 | Put riscv64 sigcode and friends in .rodata, as done on other archs ok deraadt@ | |
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f9d436f6 | 2025-01-22 18:15:48 | Fix riscv64 sigcode copying A wrongly placed ".data" resulted in sigfillsiz being put in .text, and its content derived from the first instructions of the next symbol, cpu_hatch. Said content, treated as an int, was larger than a page so the code in kern_exec.c happily copied text code in the remainder of the sigcode page, instead of repeating the intended sigfill pattern. Said kernel text later ended up in coredumps. ok miod@ deraadt@ | |
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9f52241d | 2025-01-20 20:13:29 | Upstream llvm commit e314622f204a makes it clear that ARM does not consider ARMv7 to be a strict alignment architecture. So stop setting the SCTLR.A bit. This means we don't have to change the default settings for the upcoming LLVM 19 import. ok jca@, patrick@ | |
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45f3019f | 2025-01-19 20:18:37 | Implement pmap_populate(). As noted in the arm64 commit the riscv64 pmap is derived from the arm64 pmap and suffers from the same issue. ok mpi@, jca@ | |
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679d40f1 | 2025-01-18 16:35:30 | The pmap_enter(9) function may fail even if we have enough free physical memory. This happens if we can't allocate KVA to map that memory. This is especially likely to happen with the arm64 pmap (and the riscv64 pmap that is derived from it) since lock contention on the kernel map will make us fail to allocate the required KVA. But this may happen on other architectures as well, especially those that don't define __HAVE_PMAP_DIRECT. Fix this issue by introducing a new pmap_populate() interface that may be called to populate the page tables such that a subsequent pmap_enter(9) call that uses the same virtual address will succeed. Use this in the uvm fault handler after a failed pmap_enter(9) call before we retry the fault. tested by phessler@, mglocker@ ok mpi@ | |
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11b534d6 | 2025-01-13 16:58:09 | arm64/efiboot: load DTB on HONOR Magicbook 14 Art OK kettenis@ mglocker@ | |
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0a255fef | 2025-01-12 21:54:07 | Unbreak powerpc64 by adding a dummy implementation of fdt_intr_disestablish(). | |
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b9ae17a0 | 2024-12-30 02:46:00 | All the device and file type ioctl routines just ignore FIONBIO, so stop calling down into those layer from fcntl(F_SETFL) or ioctl(FIONBIO) and delete the "do nothing for this" stubs in all the *ioctl routines. ok dlg@ | |
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d45ba34c | 2024-12-28 00:00:32 | Revive calling checkdisklabel(). It is turned out that this is needed for RAMDISK kernel to find 'a' partition of rd0. ok krw@ miod@ | |
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47df0e24 | 2024-12-22 20:38:35 | Remove forward declaration of struct clockframe, not needed here. | |
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7afc621a | 2024-12-07 21:12:22 | Implement two-level (indirect) Device Table support to increase the range of DeviceIDs we can set up for translation. Peripherals capable of doing DMA/MSIs are supposed to show up with unique DeviceIDs. The Device Table maps the DeviceID to a Interrupt Translation Table. So far we only used a single contiguous block for the Device Table, but on some machines this does not cover the whole range of physical devices. Using the GIC's indirect mode allows to move to a two-level setup to increase the range. ok kettenis@ | |
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18d3f3c5 | 2024-12-07 20:48:32 | MSIs don't work on the Qualcomm X1E machines in ACPI. So prevent agintcmsi(4) from attaching in this case such that an upcoming change to make it work (with DTB) on this hardware doesn't break the initial install. ok patrick@ | |
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d9a6171a | 2024-11-28 18:54:36 | Move cpu_features to hwcap and cpu_features2 to hwcap2 ok jca@ | |
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db835d32 | 2024-11-28 13:13:03 | Replace magic numbers to macro defined values. Also make it possible to change the amount of 3-port RAM usage by the kernel option. | |
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14cbb2b5 | 2024-11-27 20:30:15 | In powerpc64 pmap, when replacing a pte, put it in the correct pteg In pte_insert(), if both the primary page table entry group and the secondary pteg are full, then we delete an old pte and replace it with the new pte. We might have set "idx" wrong and inserted the new pte into the wrong pteg (with the wrong PTE_HID bit). This problem almost never happened; it is rare for both ptegs to be full. When the loop "for (try = 0; try < 16; try++)" looks for a slot for the new pte, set "idx" to the new pte's primary pteg. Put it in the primary pteg "idx" or secondary pteg "idx ^ pmap_ptab_mask". When we delete the old pte, set "idx" to the old pte's primary pteg. Eric Gosse reported a bug where the kernel crashed on an unexpected fault. I suspect that a pte fell into the wrong "idx" and got lost. ok kettenis@ | |
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0cd9f930 | 2024-11-27 20:11:32 | Change getfp() to return an unBIASed stack pointer; this unbreaks stackdump() which got broken in machdep.c 1.202. It is much simpler to change getfp() than stackdump() which is its only caller. | |
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be8d5ab0 | 2024-11-27 10:33:31 | remove #if 0'd entries for /dev/pcmcia functions removed in 1998 | |
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96aab481 | 2024-11-27 10:09:51 | Use uvm_fault_wire() for consistency and to keep VM_FAULT_WIRE usage in uvm/. ok dv@, mlarkin@ | |
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deef986e | 2024-11-27 05:25:56 | Add ptrace commands used to read/write the XSAVE area of a traced process. Intended to give debuggers access to xmm/ymm registers. Inspired by FreeBSD which exposes a similar set of ptrace commands. ok kettenis@ | |
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7601f687 | 2024-11-26 21:45:35 | enable ice(4) in GENERIC and RAMDISK_CD kernels on amd64 ok deraadt | |
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c229d804 | 2024-11-20 22:25:38 | The buffer flipper (incorrectly?) uses pmap_copy_page() from interrupt context (when it calls uvm_pagerealloc_multi()). But the current implementation of pmap_copy_page() assumes it only runs in process context. Use splbio() to block the interrupts while we're doing the copy. Same diff as the one committed to arm64 a bit over a week ago. ok mpi@, jca@ | |
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83e3fc60 | 2024-11-19 05:49:27 | Teach ddb how to disassemble endbr64. With input on prefix handling and ok jsg@ | |
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0815c577 | 2024-11-18 08:42:53 | Cast atomic_load_int(9) to signed int when loading `securelevel'. The return value of atomic_load_int(9) is unsigned so needs a cast, otherwise securelevel=-1 gets misrepresented. From Paul Fertser. | |
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b0d28118 | 2024-11-18 05:32:39 | move bus space extern to bus.h; ok mpi@ | |
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e8f54a3d | 2024-11-18 02:32:22 | Fix some typos in comments in i386/amd64 bootblocks Also fix some trailing whitespace in comments. From Christian Schulte, thanks | |
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d97ff3f7 | 2024-11-17 16:35:05 | add qccpucp to GENERIC ok patrick@ | |
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0aa88a20 | 2024-11-16 10:09:08 | Do not dereference `pve' after releasing `pv_mtx'. Prevent a race where anything can happen on `pve' resultint in an incorrect locking of a given pmap. Found the hardway by sthen@. ok jsg@, miod@, kettenis@, jca@ | |
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240ca67e | 2024-11-14 20:32:13 | Move the stack 1GB higher, closer to the end of the userland address space. ok kettenis@ | |
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bf17c4c7 | 2024-11-13 15:03:02 | Enable ixv(4) in RAMDISK_CD ok stu deraadt | |
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e8845835 | 2024-11-12 20:49:42 | Adds support for BPP16 16-bit color EFI framebuffer format as offered by u-boot. From Paul Fertser ok patrick@ miod@ kettenis@ | |
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9f66c2c0 | 2024-11-12 06:29:29 | remove unused arm64_machdep.h | |
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5cdf6b69 | 2024-11-12 04:56:27 | rename bus space files to match other archs ok miod@ | |
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de888251 | 2024-11-12 00:00:25 | add wd to nam2blk to match bdevsw | |
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fa2b750f | 2024-11-11 23:48:46 | order nam2blk by major number | |
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6bb4c6b2 | 2024-11-11 22:43:07 | remove unused mainbus.h; ok miod@ | |
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9b6e80ec | 2024-11-10 22:35:31 | remove vmx_pmap_find_pte_ept(), used by removed EPT mprotect ioctl ok mlarkin@ | |
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45c4fed2 | 2024-11-10 06:51:59 | replace uvm.h includes with uvm_extern.h where possible | |
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64ae5fe4 | 2024-11-10 05:59:27 | Do not call uvm_swap_finicrypt_all() a second time in dumpsys(). a change mpi@ committed to all architectures in 2015 | |
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79c3ea79 | 2024-11-10 03:02:43 | remove unused XINTR() define | |
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57179bba | 2024-11-09 12:58:29 | The buffer flipper (incorrectly?) uses pmap_copy_page() from interrupt context (when it calls uvm_pagerealloc_multi()). But the current implementation of pmap_copy_page() assumes it only runs in process context. Use splbio() to block the interrupts while we're doing the copy. ok mpi@ | |
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b87b6d98 | 2024-11-08 21:47:10 | Change 'labeloffset' to 0 from 64 as that space in the OpenBSD disklabel block is no longer used by luna88k. Tested & ok miod@ aoyam@ | |
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1ee36744 | 2024-11-08 13:18:29 | remove pmap_zero_page_uncached() used by idle page zeroing code removed from uvm in 2015 ok miod@ mpi@ mlarkin@ | |
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e75674c8 | 2024-11-08 12:48:00 | Move sparc64-specific ofw prototypes out of the MI header. | |
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2f9cdd12 | 2024-11-08 12:17:07 | Add a work-in-progress version of ice(4), a driver for Intel E810 devices. Ported from FreeBSD. This driver does not pass packets yet, lots of code is still missing. The driver will remain disabled in kernel configs until it is ready. At this stage, code for device initialization should be fairly complete. Some hardware features will require additional firmware packages to be loaded. My plan is to get things working in the basic "safe mode" first, which does not require external firmware. I will continue working on this driver in-tree, with funding from genua. Help is welcome. ok dlg@ | |
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305d28e7 | 2024-11-08 12:08:22 | psp(4) waits for acknowledgement of wbinvd from other CPU. If any other CPU has not finished wbinvd, PSP command may fail. To avoid races, call wbinvd_on_all_cpus_acked() which waits for acknowledgement from IPI handler. Provide stub to build non-MP kernels. from hshoexer@; OK mlarkin@ | |
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7f757eb4 | 2024-11-08 08:44:07 | Implement interrupt depth counter for sparc64. | |
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0e99c760 | 2024-11-08 08:43:38 | Correctly compute access type for write faults. This allows write-only mappings to work. | |
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e9c719c9 | 2024-11-08 04:40:34 | remove ID register values, cpu.c uses different defines | |
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2c368633 | 2024-11-08 04:02:30 | remove PCI MMIO defines, matches recent amd64 change | |
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081fc2e0 | 2024-11-08 01:57:34 | remove unused pmap_move() | |
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093c080e | 2024-11-08 01:44:52 | remove unused VM_MAXUSER_ADDRESS32 | |
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b53e5cb6 | 2024-11-08 00:13:39 | remove unused I386_IPI_NAMES, amd64 X86_IPI_NAMES removed in 2019 | |
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daa3eda4 | 2024-11-07 17:24:42 | Expand amd64 wbinvd_on_all_cpus() with acknowledge. Implement wbinvd_on_all_cpus_acked() similar to pmap_tlb_shootpage(). This ensures, wbinvd has been executed on all cores when the function returns. This is needed to avoid psp(4) races. from hshoexer@; OK mlarkin@ | |
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949c1c4e | 2024-11-07 16:02:29 | Constify strings in symbol-related ddb interfaces, and make the iterator callback interface a bit simpler. ok beck@ claudio@ mpi@ | |
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00e4a472 | 2024-11-07 15:40:02 | Remove OF_package_to_path(). This routine used to be needed by the OFW devices (ofnet, etc) for the VI board in the before-macppc days which nobody remembers, and has never been needed for anything on macs. | |
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aaa8efb3 | 2024-11-07 08:12:12 | Remove leftover indirections required by pre-armv7 cpu support. | |
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a69ee5f1 | 2024-11-07 07:29:47 | Remove two unnecessary instructions, at least one being a leftover from debug code added in NetBSD 1.51 not being completely removed in 1.133, and which we have been carried since 1.1 here... | |
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beff2798 | 2024-11-07 05:24:43 | add rcs ids | |
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3c0e3384 | 2024-11-06 18:59:09 | Do not store the value of sp in struct clockframe, for nothing has a need for it. | |
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87fef9b1 | 2024-11-06 12:26:54 | Address more outdated comments. | |
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b793947b | 2024-11-06 12:06:15 | A long, long, time ago, pending interrupt handlers were stored in arrays of up to 8 handlers, one arrays par ipl level. Eventually the interrupt logic was changed to linked lists, but the arrays remained, even when the pending interrupt structures were moved to per-cpu data. Simplify this by only keeping a pointer to the list head, per ipl level; update the computations in locore accordingly, and update the relevant comments to match reality as well. ok kettenis@ | |
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172a7cab | 2024-11-06 11:57:50 | Give locore a few more symbolic constants to make the code path constructing a struct clockframe rather than a struct trapframe, more visible. No functional change. ok claudio@ kettenis@ | |
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e1bfd71d | 2024-11-06 07:11:14 | Remove a non-applicable comment about 32-bit userland code. While there, remove unused defines. | |
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0c9d3924 | 2024-11-06 07:09:45 | Make edid_parse() take a device name as extra argument so that the few messages it may print are tied to the particular device it concerns. | |
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4f65644b | 2024-11-05 21:47:00 | The `pri' field of struct clockframe has become unused since the removal of the need for CLKF_BASEPRI in OpenBSD 3.2. Rename it to stress the fact that it is no longer used. | |
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3836e7c7 | 2024-11-05 18:58:59 | The first field of struct cfdriver is a pointer. Put NULL rather than 0 here. | |
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ea26acc8 | 2024-11-05 16:33:18 | Fix typo in smbios product string for the HP OmniBook X. Keep entries sorted by vendor. ok miod@, mlarkin@ | |
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500d3fe6 | 2024-11-05 14:49:52 | Apply the changes in sys/lib/libsa/alloc.c 1.13 to the other copies of that file modified to use OpenFirmware routines: ``Make the freelist best fit code a tiny bit smarter to not use a block if half or more would be wasted. Causes more effective re-use of blocks.'' Bump bootloader version in the unlikely case this misbehaves on some machines. |