IABSD.fr/src/sys/dev/sdmmc

Branch :


Log

Author Commit Date CI Message
8ab765f8 2024-10-19 21:10:03 Change sdhc_bus_power() behavior to return success and not perform a power-off voltage switch sequence when card is already operating at requested voltage. Zap the NOPWR0 quirk for Intel controllers. ok stsp@ kettenis@
9286d81d 2024-08-18 15:03:01 For DVACT_RESUME, let the children know we are ready *after* calling our own wakeup(). The wakeup() won't result in anything running now because DVACT_RESUME is running in "cold !=0, interrupts blocked, scheduler stopped", but it is idiomatically incorrect to inform your children you are ready before you are ready.
d80c3592 2024-08-06 15:03:36 On the RK3588 eMMC controller it appears that after a failed command a completion signal shows up some time after the error signal. This can lead to the case that when the next command is being executed, the old completion signal is still recorded and the driver may think the command already executed. Resetting the status before executing a new command makes sense, albeit it's technically still possible that the controller issues another completion signal. It shouldn't happen because a reset was issued and we're also waiting for the command and data inhibit bits to be cleared, but who knows. This makes the eMMC come up reliably. ok kettenis@
4e9dcb19 2023-10-01 08:56:24 Print the correct SDHC spec version. ok deraadt@
834ff46c 2023-04-19 02:01:02 dwmshc on rockchips don't support dma crossy 128M boundaries. let controllers pass the dma boundaries to sdmmc as part of the attach args so it can be used for the bus_dmamap_create. add the boundary to sdhci so dwmshc can set it to be bassed to sdmmc. tested on a radxa e25 booting and rooting off the onboard emmc. before this diff some programs would fault with weird instructions.
10d2c6b3 2023-04-19 01:46:10 dont advertise non-removable sdmmc devices as removable to the scsi layer. this is cosmetic more than anything cos it gets rid of "removable" in dmesg output when sd attaches.
5deea848 2023-04-19 01:42:13 handle some more manufacturer ids.
b3af768d 2023-04-11 00:45:06 fix double words in comments feedback and ok jmc@ miod, ok millert@
e4453397 2023-01-04 14:42:46 Christos Zoulas removed his name from advertising clauses and copyrights of some files in NetBSD. Make the same changes here. https://mail-index.netbsd.org/source-changes/2017/06/03/msg084953.html https://mail-index.netbsd.org/source-changes/2017/06/03/msg084955.html https://mail-index.netbsd.org/source-changes/2019/12/02/msg111431.html https://mail-index.netbsd.org/source-changes/2019/12/02/msg111432.html
3119f858 2022-09-03 15:29:43 Allow suspend with root on sdmmc(4). ok deraadt@
a454aff3 2022-04-16 19:19:58 constify SCSI adapter entry points ok krw@
471aeecf 2022-04-06 18:59:26 constify struct cfattach
a6b1cea4 2022-03-18 11:09:55 regen
8acad61e 2022-03-18 11:09:39 Add bwfm chips to sdmmcdevs in order to get symbolic constants for them. ok jsg
7c15ff68 2022-03-18 11:08:34 Don't bother generating (unused) CIS overrides. ok jsg
e7a76d17 2022-01-19 10:51:04 On SDHC version 3.0 controllers the divisor doesn't have to be a power of two, but can be a multiple of two. Make use of this to achieve card clock frequencies closer to the target frequency. ok visa@
bfa5fdb5 2022-01-18 11:36:21 Improve how quirks are handled on sdhc(4)-compatible drivers. So far we have passed a modified version of the contents in the capabilities register if we wanted to override what sdhc(4) would otherwise read. Unfortunately there's a second capabilities register that we did not yet take into consideration, which is why to disable DDR50 support we created a quirk flag in the softc. The sdhc(4) ACPI nodes have a way to mask and set bits in both of the capabilities register, which is a flexible approach to solving that issue and using that for our sdhc(4) drivers even improves readability. ok kettenis@
91654044 2022-01-10 18:23:39 Return ENOMEM on malloc errors to prevent use of uninitialized stack memory. Cleanup error handling while here. ok stsp@ visa@
aec445ea 2021-11-02 14:49:53 Recognize BCM43436, as seen on the Raspberry Pi Zero 2 W. ok jsg@
db31205a 2021-10-23 12:48:17 Make sure we have enough space to add padding and final token to the nvram data. Also add the MAC address to the nvram data when there is a "local-mac-address" property in the device tree. This makes bwfm(4) work with the firmware/nvram/clm_blob files provided with MacOS on the Apple M1 Macs. ok patrick@
d03761f2 2021-09-11 22:42:12 Don't set the highspeed bit on bcm2835-sdhci sdhc(4) controllers. Same approach as on Linux and NetBSD. This fixes bwfm(4) Wi-Fi on the Raspberry Pi 3 Model B Plus. help and ok kettenis@
5e422abe 2021-06-13 06:57:51 refer to the correct domain for sdhc spec from fkr
3e3c1da1 2021-06-06 10:48:30 Add firmware selection for BRCM_CC_43241_CHIP_ID (0x4324). According to NetBSD, this chip uses one of three firmwares depending on its revision, but all of them are already included in the bwfm-firmware package, so we can load one of them. ok patrick@ sthen@
9949a151 2021-03-27 14:36:28 Fix SDMMC_DEBUG build - Replace undefined SDMMCDEVNAME macro with usual DEVNAME from sdmmcvar.h - typofix struct member name
94e4747c 2021-02-26 00:07:41 Refactor bwfm(4) firmware loading. The PCIe backend will need to be able to load the CLM blob like the SDIO backend already does. Additionally it is also helpful for the PCIe backend to try a file named after the device tree compatible. Thus refactor the SDIO code and make it available for both SDIO and PCIe.
bc9b7139 2020-12-26 03:45:57 sdmmc(4): sdmmc_io_function_enable(): don't sleep on lbolt Just sleep for 1 second on the nowake channel instead. With input from kettenis@, mpi@, and claudio@. ok kettenis@
a83ec286 2020-10-15 13:22:12 Replace simple one-line bcopy()/memcpy() of faked data into scsi_xfer with call to scsi_copy_internal_data(). Thus getting xs->resid properly set and adding the usual uio/size sanity checks.
664c6166 2020-09-22 19:32:51 Since dlg@'s 2009 scsi midlayer refactoring the 'struct scsi_generic *cmd' member of 'struct scsi_xfer' has always been pointed at the 'struct scsi_generic cmdstore' member of the same instance. So nuke 'cmdstore' and remove the '*' from cmd. Take the address of cmd as required by the various casts. No intentional functional change. luna88k test by aoyama@, sparc64 test by jmatthew@ Identification of 2009's last *cmd use and ok jmatthew@
3ca8dabf 2020-09-05 13:05:06 Replace '32' with SID_SCSI2_ALEN (a.k.a. 31) when building emulated INQUIRY responses. This is what the SCSI specifications say is the correct value and already used in several cases.
bb4b71eb 2020-09-03 12:41:28 Replace '.response_format = 2' with '.response_format = SID_SCSI2_RESPONSE'.
b291b595 2020-09-02 21:16:29 When building emulated INQUIRY results use the SCSI_REV_* #define's to initialize the 'version' field. Not numbers.
eccd596d 2020-09-01 12:17:52 Rename [READ|WRITE]_BIG to [READ|WRITE]_10. Rename struct scsi_rw_big to struct scsi_rw_10. ok gnezdo@ jmatthew@ (who also did sparc64 compile test)
d3ec1c86 2020-08-24 15:06:10 Implement UHS-I support in the sdmmc(4) midlayer. ok mglocker@
71795fee 2020-08-15 13:21:02 Print ddr52 and hs200 indicators if those modes are supported. ok stsp@
a62fc20a 2020-08-14 14:49:04 Add support for eMMC HS200 mode. Loosely based on code from NetBSD. ok patrick@
9b4e521a 2020-07-25 16:34:30 No need for a bzero(), just init saa.sf to NULL. All the saa.saa fields are explicitly initialized.
500422e9 2020-07-24 12:43:31 Turning on various scsi drivers' *DEBUG options reveals that this has rarely (if ever) been done. Fix many printf format errors to calm clang and gcc on amd64, i386, hppa. Missing #include, complaints if 'option <blah>DEBUG' is used in config files, etc. All in debug code.
7380a3a4 2020-07-22 13:16:04 Nuke unused struct scsi_link members of adapter softc's where the driver successfully compiles on one or more of amd64, i386, hppa.
e5eae15d 2020-07-20 14:41:12 Move remaining scsi bus initialization info from "prototype scsi link" fields to struct scsibus_attach_args. Nuke the struct scsi_link * (saa_sc_link) in scaibus_attach_args. Explicitly initialize each field in scsibus_attach_args variables.
ead808c4 2020-07-19 18:57:57 Move the adapter related items (luns, adapter, adapter_target, adapter_buswidth, adapter_softc) from struct scsi_link to struct scsibus_attach_args. Additional compile tests by jmatthew@ (sparc64) and aoyam@ (luna88k).
0b29cb40 2020-07-16 21:18:29 Access adapter softc via link->bus->sb_adapter_softc. In sparc64 autoconf access 'luns' via sb_luns and 'adapter_buswidth' via sb_adapter_buswidth. Removes last post-config uses of the copies of bus related information in scsi_link.
d4769f94 2020-07-13 13:43:31 Remove some pointless casting of void * when assigning one (scsi_link.adapter_softc) to a pointer of a particular softc type.
185ff997 2020-07-03 13:31:47 Pass the expected 'scsibus_attach_args *' to scsibus_attach() via config_found(), not a 'scsi_link *'. Part of matthew@'s 2010 work.
0d580645 2020-06-19 20:56:23 Add support for BCM4359 SDIO variants such as the AP6359SA module found on the RockPro64 WiFi module. Note that there is no fiirmware for this chip in the bwfm-firmware package at the moment. ok patrick@
679ad45b 2020-06-14 18:37:16 Make sure SDHC_HOST_CTL2 is consistently controlled using 2-byte accesses, otherwise it would lead to unaligned memory access. Fixes a panic on my MACCHIATObin. ok kettenis@
fa1cdcb1 2020-05-22 10:23:14 Add pre/post hooks for bus clock changes to sdhc(4). These will be used by sdhc(4) attachment drivers to do additional MD initialization. ok kettenis@
6c2f85e4 2020-05-15 14:09:14 Some newer bwfm(4) chips from Cypress hold their regulatory constraints in a separate blob, instead of in the firmware. This .clm_blob needs to be loaded as well.
3f3abf14 2020-05-13 17:31:16 sdhc(4), sdmmc(4): tsleep(9) -> tsleep_nsec(9); ok patrick@
4372d0df 2020-04-29 09:44:49 According to the SDIO Simplified Specification 3.0, a tuple length (aka link field) of 0 specifies an empty tuple body. This implies that a tuple length of 0 is actually allowed, so we don't need to error out if we encounter one. Seen on an SDIO-connected ath10k. ok kettenis@
1dd2d335 2020-04-27 11:37:23 fix SDHC_DEBUG build, remove procname printf's ok kettenis@
b102dfaa 2020-04-19 21:40:21 Add comments to clarify the hex IDs of some bwfm(4) devices on SD bus. ok jmc@ deraadt@ kettenis@ "thanks and don't wait for me" patrick@
37d45816 2020-04-19 16:25:33 Add support for hardware where an SDHC controller lives on a bus that only supports 32-bit access (hello Raspberry Pi). ok tobhe@
04b7fce9 2020-04-19 16:15:20 Add support for hardware where an SDHC controller lives on a bus that only supports 32-bit access (hello Raspberry Pi). ok tobhe@
7a025419 2020-03-14 01:30:34 On fdt platforms attempt to load system specific .txt and .bin files with filenames constructed from the first compatible string of the root node. Matches the format used in the linux-firmware repository. If these are not found fallback to the generic filenames. When the compatible string contains a '/' as in 'solidrun,cubox-i/q' it will be handled as everything before the '/' so the cubox filename is brcmfmac4330-sdio.solidrun,cubox-i.txt. ok kurt@ patrick@
5bc73f03 2020-03-13 15:30:58 Recognize BCM43341 as a BCM43340 variant. From Rob Schmersel
9ead8393 2020-03-07 09:56:46 Use snprintf(9) to create the names for the firmware and NVRAM files. This reduces the amount of duplicated lines per chip, and allows us to ship per- board files in the future. Based on a diff from jsg@ ok kurt@
d88c1a54 2020-03-06 09:28:40 Fixup bwfm(4) register bit regarding SDIO device suspend/resume.
632f7369 2020-03-06 08:41:57 Process the NVRAM in bwfm(4) itself. So far we have relied on some external tool to pre-process the NVRAM, even though it's simple to do ourselves. This allows easier firmware distribution. ok kurt@
6f241297 2020-02-25 14:24:58 Make bwfm(4) call if_input() only once per interrupt. This reduces drops caused by the ifq pressure drop mechanism and hence increases throughput. ok tobhe@
7f649021 2020-02-20 16:26:01 Relax the grip the dead hand of QBUS (a.k.a. MAXPHYS) has on the throat of physio(). Allows individual devices to eventually be modified to support larger physio() (a.k.a. 'raw') i/o's if they prove capable of them. No immediate functional change. Tested for many weeks by and ok robert@.
4d7d9900 2020-02-12 14:08:56 Bring a few stragglers into line with the idiom used by the other 40+ scsi drivers. i.e. eliminate the struct scsi_adapter member in the softc and rely on the pointer to a static scsi_adapter in the struct scsi_link member.
9f36bc94 2020-01-26 00:53:31 Shuffle some names around to make reading the code less headache inducing. Rename scsi_adapter member 'scsi_minphys' to 'dev_minphys' to reflect what it is supposed to do. Use consistent naming convention (<dev>_minphys) for the actual device functions. No functional change.
6d832bc2 2020-01-25 21:48:42 Drivers that implement their own *minphys() don't need to call the system minphys(). scsi_minphys() will do that and cd/sd/st will call scsi_minphys(). ok jmatthew@ as part of larger diff
42b5d655 2020-01-22 12:08:55 Recognize BCM4345 rev 9, which requires a different firmware, as shipped with the Pinebook Pro as an AMPAK AP6256 module.
ab8e3451 2020-01-22 07:52:37 delete wasteful ;; ok tedu
03604742 2019-12-31 10:05:32 Convert infinite sleeps to {m,t}sleep_nsec(9). ok kn@
fd406f4d 2019-04-02 07:08:39 Don't detach non-removable devices during resume on "sdhc* at acpi?". Makes hibernate work with rootfs on built-in emmc storage. Tested on King Jim Portabook. ok deraadt@ kettenis@
cb2afc74 2019-02-07 07:39:56 Consistently use m_freem(9). This fixes possible leaks in a few error cases.
8049d49e 2019-02-04 10:33:56 Turns out we do need to handle control messages that exceed MLEN, so allocate a cluster if the message is larger than that. Fixes a panic on shutdown on my Asus X205TA. ok patrick@, stsp@
2afcf50d 2018-12-29 11:37:30 Allow passing the maximum size of a segment that a SD/MMC host controller can handle for DMA tranfers, since not all support 64k. ok kettenis@
6e222054 2018-12-22 14:42:29 Avoid using m_trailingspace(9) on an mbuf allocated with MGET(9) as it relies on header fields that aren't initialized, which may trigger an assertion. Check whether the control message doesn't exceed MLEN instead and turn the check into a KASSERT as the driver should not generate control messages that are larger. with help form claudio@ (who points out that the driver should not use MT_CONTROL here). ok patrick@
b5b7f62e 2018-11-09 14:14:31 M_LEADINGSPACE() and M_TRAILINGSPACE() are just wrappers for m_leadingspace() and m_trailingspace(). Convert all callers to call directly the functions and remove the defines. OK krw@, mpi@
b60bffef 2018-09-06 10:15:17 Implement 64-bit DMA support in sdhc(4). tested in snaps ok kettenis@
571fa1d2 2018-08-09 14:23:50 Implement out-of-band interrupt support in the bwfm(4) SDIO backend.
68a1c7f6 2018-08-09 13:52:36 Allow passing per-function cookies through the SD/MMC bus to SDIO devices. This allows SDIO device drivers to read information from the ACPI or FDT tables. ok kettenis@
154570e2 2018-08-09 13:50:15 Correct the bitmask that returns the function count. We missed a bit and thus only supported 4 functions instead of 8. ok kettenis@
529fc9df 2018-07-24 15:45:52 Add support fotr the BCM4335/4339 SDIO chip to bwfm(4). This one is a bit slow booting up, so give it a bit longer to enable the clock. ok patrick@
2802c178 2018-07-17 19:44:38 TX packets, which can be either Ethernet or control packets, must be sent in order. Otherwise it is possible that the key is set before we send out the EAPOL packet, or that packets are sent out before the key is set. Thus modify the SDIO backend to put both types into the same internal TX queue, which will be sent asynchronously. Discussed with bluhm@
315a0156 2018-07-16 13:46:17 Add support for the BCM43455 SDIO chip to bwfm(4).
2d669484 2018-07-16 13:41:19 In certain modes SDIO-connected bwfm(4) chips might expect us to read another packet (even though nextlen is set to none) to issue more RX interrupts.
5653bc9e 2018-06-18 15:01:22 Run the code to handle interrupts directly from the interrupt handler instead of from a task. The sdmmc(4) interrupt handler is already executed in process context and returning from the interrupt handler without acknowledging the interrupts may lead to an interrupt storm. ok patrick@
c1637d79 2018-06-17 17:10:17 Add curly braces to the if-condition to make sure the bus width is only bumped if the high-speed mode is available. ok kettenis@
b427a827 2018-06-04 15:04:57 in non-DIAGNOSTIC kernels, rw_assert_wrlock becomes a nop which leaves the local variable dangling, so calculate the lock address by hand at invocation ok kettenis
a47fed74 2018-06-04 13:33:10 4-bit bus width is mandatory for SDIO cards that support High Speed mode, so switch from 1-bit to 4-bit bus width if the host controller supports it. ok kettenis@
1b276e0c 2018-06-04 10:37:14 Switch to SDIO High Speed mode if the host controller supports it. ok kettenis@
1cadc271 2018-05-30 14:53:11 Implement SDIO DMA support. This is achieved by wrapping the sdmmc_io_rw_extended() function and loading the passed buffer using the bus dma API akin to the SDMMC memory card code. The 2-byte and 4-byte accessors continue to use PIO. ok kettenis@
d7d6fed2 2018-05-30 14:04:53 For the upcoming SDIO DMA support we need to use DMA-able buffer to send/receive data. This basically means that we cannot use any malloc(9)'d buffer. For this, use dma_alloc(9) to allocate a buf that can fit a whole SDIO frame (unfortunately without headers). Keep note that we need to round up the transfer sizes to block- sized (for TX packets) or 4-byte alignment, since some DMA con- trollers truncate the request size. If there's anything wrong, the KASSERTs will catch it. ok kettenis@
cb39577e 2018-05-30 13:32:40 Clear the DMA select bits in case we use PIO instead of DMA. Some SDHC controllers get confused if the ADMA bit is set even though we don't set the DMA enable flag. This can happen with the SDIO stack which uses PIO for 4 byte read/writes but DMA for larger transfers and thus switches from one mode to the other. ok kettenis@
ca890d05 2018-05-27 16:20:33 BCM43430 SDIO works if we load the appropriate firmware. ok patrick@
52b371b7 2018-05-26 12:50:18 BCM4356 SDIO works if we load the appropriate firmware. ok patrick@
5e0782b1 2018-05-25 00:12:53 So far the SDIO stack issued one transfer for every 64 byte to be copied. This severely limits the speed over the bus. By using block mode we can issue block-sized transfers, which bumps the transfer size to at least 512 bytes. By using multi-block mode we can copy up to 511 blocks per transfer. ok kettenis@
402f30ee 2018-05-25 00:04:11 For SDIO multi-blocks we must not use the AUTO CMD12 feature, this is only for memory card read/writes. ok kettenis@
ee8f7f89 2018-05-24 11:44:46 Release rwlock on bwfm(4) SDIO initialization error. Fixes hang found by florian@ when firmware isn't present initially.
972218f3 2018-05-23 11:32:14 Implement a separate initialization stage so that we can still use and initialize bwfm(4) later in the case that the firmware was not available on bootup and was only later installed. ok stsp@
680c8428 2018-05-23 09:08:18 Extend list of supported bwfm(4) SDIO chips.
f5abefba 2018-05-21 17:12:16 Make the way we print "not configured" lines for SDIO devices a bit nicer. ok stsp@
7802bd2e 2018-05-21 08:07:43 Consistently suffix the pre-processed NVRAM binary that the bwfm(4)'s firmware requires on SDIO-connected chips. From ketttenis@
e4f06f9c 2018-05-19 10:43:10 Akin to the PCI attachment driver we can extract the chip's dmesg(8) over the SDIO bus by accessing the correct addresses. This helped me find the RX FIFO overflow issue and might help find more issues where the chip's firmware complains about our wrongdoing.
bdeccf4c 2018-05-18 08:40:11 After reading the first frame, which we can do in two reads (software plus hardware header, which tell us the length of the following data), we can issue full packet reads. The software header contains a field that informs us of the full length of the next frame that we can read, so we can do that in a single sitting. This brings us down from three SDIO read invocation to a single one per packet for a given RX stream.
95ad3941 2018-05-17 21:59:26 The Broadcom FullMAC firmware has a few ways of doing flow control. One of those is a sequence number based window mechanism. Essentially every packet on the SDIO bus has a sequence number. The chip records which sequence number we used last and when it sends us replies, it tells us the maximum sequence number it accepts. This means we can calculate a window of sequence numbers that we are allowed to use. With this I no longer overflow the chip's RX fifo and can do stable network transfers.