IABSD.fr/src/sys/dev/sdmmc
Branch :
Log
| Author | Commit | Date | CI | Message |
|---|---|---|---|---|
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71795fee | 2020-08-15 13:21:02 | Print ddr52 and hs200 indicators if those modes are supported. ok stsp@ | |
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a62fc20a | 2020-08-14 14:49:04 | Add support for eMMC HS200 mode. Loosely based on code from NetBSD. ok patrick@ | |
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9b4e521a | 2020-07-25 16:34:30 | No need for a bzero(), just init saa.sf to NULL. All the saa.saa fields are explicitly initialized. | |
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500422e9 | 2020-07-24 12:43:31 | Turning on various scsi drivers' *DEBUG options reveals that this has rarely (if ever) been done. Fix many printf format errors to calm clang and gcc on amd64, i386, hppa. Missing #include, complaints if 'option <blah>DEBUG' is used in config files, etc. All in debug code. | |
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7380a3a4 | 2020-07-22 13:16:04 | Nuke unused struct scsi_link members of adapter softc's where the driver successfully compiles on one or more of amd64, i386, hppa. | |
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e5eae15d | 2020-07-20 14:41:12 | Move remaining scsi bus initialization info from "prototype scsi link" fields to struct scsibus_attach_args. Nuke the struct scsi_link * (saa_sc_link) in scaibus_attach_args. Explicitly initialize each field in scsibus_attach_args variables. | |
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ead808c4 | 2020-07-19 18:57:57 | Move the adapter related items (luns, adapter, adapter_target, adapter_buswidth, adapter_softc) from struct scsi_link to struct scsibus_attach_args. Additional compile tests by jmatthew@ (sparc64) and aoyam@ (luna88k). | |
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0b29cb40 | 2020-07-16 21:18:29 | Access adapter softc via link->bus->sb_adapter_softc. In sparc64 autoconf access 'luns' via sb_luns and 'adapter_buswidth' via sb_adapter_buswidth. Removes last post-config uses of the copies of bus related information in scsi_link. | |
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d4769f94 | 2020-07-13 13:43:31 | Remove some pointless casting of void * when assigning one (scsi_link.adapter_softc) to a pointer of a particular softc type. | |
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185ff997 | 2020-07-03 13:31:47 | Pass the expected 'scsibus_attach_args *' to scsibus_attach() via config_found(), not a 'scsi_link *'. Part of matthew@'s 2010 work. | |
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0d580645 | 2020-06-19 20:56:23 | Add support for BCM4359 SDIO variants such as the AP6359SA module found on the RockPro64 WiFi module. Note that there is no fiirmware for this chip in the bwfm-firmware package at the moment. ok patrick@ | |
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679ad45b | 2020-06-14 18:37:16 | Make sure SDHC_HOST_CTL2 is consistently controlled using 2-byte accesses, otherwise it would lead to unaligned memory access. Fixes a panic on my MACCHIATObin. ok kettenis@ | |
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fa1cdcb1 | 2020-05-22 10:23:14 | Add pre/post hooks for bus clock changes to sdhc(4). These will be used by sdhc(4) attachment drivers to do additional MD initialization. ok kettenis@ | |
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6c2f85e4 | 2020-05-15 14:09:14 | Some newer bwfm(4) chips from Cypress hold their regulatory constraints in a separate blob, instead of in the firmware. This .clm_blob needs to be loaded as well. | |
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3f3abf14 | 2020-05-13 17:31:16 | sdhc(4), sdmmc(4): tsleep(9) -> tsleep_nsec(9); ok patrick@ | |
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4372d0df | 2020-04-29 09:44:49 | According to the SDIO Simplified Specification 3.0, a tuple length (aka link field) of 0 specifies an empty tuple body. This implies that a tuple length of 0 is actually allowed, so we don't need to error out if we encounter one. Seen on an SDIO-connected ath10k. ok kettenis@ | |
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1dd2d335 | 2020-04-27 11:37:23 | fix SDHC_DEBUG build, remove procname printf's ok kettenis@ | |
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b102dfaa | 2020-04-19 21:40:21 | Add comments to clarify the hex IDs of some bwfm(4) devices on SD bus. ok jmc@ deraadt@ kettenis@ "thanks and don't wait for me" patrick@ | |
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37d45816 | 2020-04-19 16:25:33 | Add support for hardware where an SDHC controller lives on a bus that only supports 32-bit access (hello Raspberry Pi). ok tobhe@ | |
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04b7fce9 | 2020-04-19 16:15:20 | Add support for hardware where an SDHC controller lives on a bus that only supports 32-bit access (hello Raspberry Pi). ok tobhe@ | |
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7a025419 | 2020-03-14 01:30:34 | On fdt platforms attempt to load system specific .txt and .bin files with filenames constructed from the first compatible string of the root node. Matches the format used in the linux-firmware repository. If these are not found fallback to the generic filenames. When the compatible string contains a '/' as in 'solidrun,cubox-i/q' it will be handled as everything before the '/' so the cubox filename is brcmfmac4330-sdio.solidrun,cubox-i.txt. ok kurt@ patrick@ | |
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5bc73f03 | 2020-03-13 15:30:58 | Recognize BCM43341 as a BCM43340 variant. From Rob Schmersel | |
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9ead8393 | 2020-03-07 09:56:46 | Use snprintf(9) to create the names for the firmware and NVRAM files. This reduces the amount of duplicated lines per chip, and allows us to ship per- board files in the future. Based on a diff from jsg@ ok kurt@ | |
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d88c1a54 | 2020-03-06 09:28:40 | Fixup bwfm(4) register bit regarding SDIO device suspend/resume. | |
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632f7369 | 2020-03-06 08:41:57 | Process the NVRAM in bwfm(4) itself. So far we have relied on some external tool to pre-process the NVRAM, even though it's simple to do ourselves. This allows easier firmware distribution. ok kurt@ | |
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6f241297 | 2020-02-25 14:24:58 | Make bwfm(4) call if_input() only once per interrupt. This reduces drops caused by the ifq pressure drop mechanism and hence increases throughput. ok tobhe@ | |
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7f649021 | 2020-02-20 16:26:01 | Relax the grip the dead hand of QBUS (a.k.a. MAXPHYS) has on the throat of physio(). Allows individual devices to eventually be modified to support larger physio() (a.k.a. 'raw') i/o's if they prove capable of them. No immediate functional change. Tested for many weeks by and ok robert@. | |
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4d7d9900 | 2020-02-12 14:08:56 | Bring a few stragglers into line with the idiom used by the other 40+ scsi drivers. i.e. eliminate the struct scsi_adapter member in the softc and rely on the pointer to a static scsi_adapter in the struct scsi_link member. | |
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9f36bc94 | 2020-01-26 00:53:31 | Shuffle some names around to make reading the code less headache inducing. Rename scsi_adapter member 'scsi_minphys' to 'dev_minphys' to reflect what it is supposed to do. Use consistent naming convention (<dev>_minphys) for the actual device functions. No functional change. | |
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6d832bc2 | 2020-01-25 21:48:42 | Drivers that implement their own *minphys() don't need to call the system minphys(). scsi_minphys() will do that and cd/sd/st will call scsi_minphys(). ok jmatthew@ as part of larger diff | |
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42b5d655 | 2020-01-22 12:08:55 | Recognize BCM4345 rev 9, which requires a different firmware, as shipped with the Pinebook Pro as an AMPAK AP6256 module. | |
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ab8e3451 | 2020-01-22 07:52:37 | delete wasteful ;; ok tedu | |
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03604742 | 2019-12-31 10:05:32 | Convert infinite sleeps to {m,t}sleep_nsec(9). ok kn@ | |
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fd406f4d | 2019-04-02 07:08:39 | Don't detach non-removable devices during resume on "sdhc* at acpi?". Makes hibernate work with rootfs on built-in emmc storage. Tested on King Jim Portabook. ok deraadt@ kettenis@ | |
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cb2afc74 | 2019-02-07 07:39:56 | Consistently use m_freem(9). This fixes possible leaks in a few error cases. | |
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8049d49e | 2019-02-04 10:33:56 | Turns out we do need to handle control messages that exceed MLEN, so allocate a cluster if the message is larger than that. Fixes a panic on shutdown on my Asus X205TA. ok patrick@, stsp@ | |
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2afcf50d | 2018-12-29 11:37:30 | Allow passing the maximum size of a segment that a SD/MMC host controller can handle for DMA tranfers, since not all support 64k. ok kettenis@ | |
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6e222054 | 2018-12-22 14:42:29 | Avoid using m_trailingspace(9) on an mbuf allocated with MGET(9) as it relies on header fields that aren't initialized, which may trigger an assertion. Check whether the control message doesn't exceed MLEN instead and turn the check into a KASSERT as the driver should not generate control messages that are larger. with help form claudio@ (who points out that the driver should not use MT_CONTROL here). ok patrick@ | |
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b5b7f62e | 2018-11-09 14:14:31 | M_LEADINGSPACE() and M_TRAILINGSPACE() are just wrappers for m_leadingspace() and m_trailingspace(). Convert all callers to call directly the functions and remove the defines. OK krw@, mpi@ | |
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b60bffef | 2018-09-06 10:15:17 | Implement 64-bit DMA support in sdhc(4). tested in snaps ok kettenis@ | |
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571fa1d2 | 2018-08-09 14:23:50 | Implement out-of-band interrupt support in the bwfm(4) SDIO backend. | |
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68a1c7f6 | 2018-08-09 13:52:36 | Allow passing per-function cookies through the SD/MMC bus to SDIO devices. This allows SDIO device drivers to read information from the ACPI or FDT tables. ok kettenis@ | |
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154570e2 | 2018-08-09 13:50:15 | Correct the bitmask that returns the function count. We missed a bit and thus only supported 4 functions instead of 8. ok kettenis@ | |
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529fc9df | 2018-07-24 15:45:52 | Add support fotr the BCM4335/4339 SDIO chip to bwfm(4). This one is a bit slow booting up, so give it a bit longer to enable the clock. ok patrick@ | |
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2802c178 | 2018-07-17 19:44:38 | TX packets, which can be either Ethernet or control packets, must be sent in order. Otherwise it is possible that the key is set before we send out the EAPOL packet, or that packets are sent out before the key is set. Thus modify the SDIO backend to put both types into the same internal TX queue, which will be sent asynchronously. Discussed with bluhm@ | |
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315a0156 | 2018-07-16 13:46:17 | Add support for the BCM43455 SDIO chip to bwfm(4). | |
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2d669484 | 2018-07-16 13:41:19 | In certain modes SDIO-connected bwfm(4) chips might expect us to read another packet (even though nextlen is set to none) to issue more RX interrupts. | |
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5653bc9e | 2018-06-18 15:01:22 | Run the code to handle interrupts directly from the interrupt handler instead of from a task. The sdmmc(4) interrupt handler is already executed in process context and returning from the interrupt handler without acknowledging the interrupts may lead to an interrupt storm. ok patrick@ | |
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c1637d79 | 2018-06-17 17:10:17 | Add curly braces to the if-condition to make sure the bus width is only bumped if the high-speed mode is available. ok kettenis@ | |
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b427a827 | 2018-06-04 15:04:57 | in non-DIAGNOSTIC kernels, rw_assert_wrlock becomes a nop which leaves the local variable dangling, so calculate the lock address by hand at invocation ok kettenis | |
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a47fed74 | 2018-06-04 13:33:10 | 4-bit bus width is mandatory for SDIO cards that support High Speed mode, so switch from 1-bit to 4-bit bus width if the host controller supports it. ok kettenis@ | |
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1b276e0c | 2018-06-04 10:37:14 | Switch to SDIO High Speed mode if the host controller supports it. ok kettenis@ | |
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1cadc271 | 2018-05-30 14:53:11 | Implement SDIO DMA support. This is achieved by wrapping the sdmmc_io_rw_extended() function and loading the passed buffer using the bus dma API akin to the SDMMC memory card code. The 2-byte and 4-byte accessors continue to use PIO. ok kettenis@ | |
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d7d6fed2 | 2018-05-30 14:04:53 | For the upcoming SDIO DMA support we need to use DMA-able buffer to send/receive data. This basically means that we cannot use any malloc(9)'d buffer. For this, use dma_alloc(9) to allocate a buf that can fit a whole SDIO frame (unfortunately without headers). Keep note that we need to round up the transfer sizes to block- sized (for TX packets) or 4-byte alignment, since some DMA con- trollers truncate the request size. If there's anything wrong, the KASSERTs will catch it. ok kettenis@ | |
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cb39577e | 2018-05-30 13:32:40 | Clear the DMA select bits in case we use PIO instead of DMA. Some SDHC controllers get confused if the ADMA bit is set even though we don't set the DMA enable flag. This can happen with the SDIO stack which uses PIO for 4 byte read/writes but DMA for larger transfers and thus switches from one mode to the other. ok kettenis@ | |
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ca890d05 | 2018-05-27 16:20:33 | BCM43430 SDIO works if we load the appropriate firmware. ok patrick@ | |
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52b371b7 | 2018-05-26 12:50:18 | BCM4356 SDIO works if we load the appropriate firmware. ok patrick@ | |
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5e0782b1 | 2018-05-25 00:12:53 | So far the SDIO stack issued one transfer for every 64 byte to be copied. This severely limits the speed over the bus. By using block mode we can issue block-sized transfers, which bumps the transfer size to at least 512 bytes. By using multi-block mode we can copy up to 511 blocks per transfer. ok kettenis@ | |
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402f30ee | 2018-05-25 00:04:11 | For SDIO multi-blocks we must not use the AUTO CMD12 feature, this is only for memory card read/writes. ok kettenis@ | |
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ee8f7f89 | 2018-05-24 11:44:46 | Release rwlock on bwfm(4) SDIO initialization error. Fixes hang found by florian@ when firmware isn't present initially. | |
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972218f3 | 2018-05-23 11:32:14 | Implement a separate initialization stage so that we can still use and initialize bwfm(4) later in the case that the firmware was not available on bootup and was only later installed. ok stsp@ | |
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680c8428 | 2018-05-23 09:08:18 | Extend list of supported bwfm(4) SDIO chips. | |
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f5abefba | 2018-05-21 17:12:16 | Make the way we print "not configured" lines for SDIO devices a bit nicer. ok stsp@ | |
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7802bd2e | 2018-05-21 08:07:43 | Consistently suffix the pre-processed NVRAM binary that the bwfm(4)'s firmware requires on SDIO-connected chips. From ketttenis@ | |
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e4f06f9c | 2018-05-19 10:43:10 | Akin to the PCI attachment driver we can extract the chip's dmesg(8) over the SDIO bus by accessing the correct addresses. This helped me find the RX FIFO overflow issue and might help find more issues where the chip's firmware complains about our wrongdoing. | |
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bdeccf4c | 2018-05-18 08:40:11 | After reading the first frame, which we can do in two reads (software plus hardware header, which tell us the length of the following data), we can issue full packet reads. The software header contains a field that informs us of the full length of the next frame that we can read, so we can do that in a single sitting. This brings us down from three SDIO read invocation to a single one per packet for a given RX stream. | |
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95ad3941 | 2018-05-17 21:59:26 | The Broadcom FullMAC firmware has a few ways of doing flow control. One of those is a sequence number based window mechanism. Essentially every packet on the SDIO bus has a sequence number. The chip records which sequence number we used last and when it sends us replies, it tells us the maximum sequence number it accepts. This means we can calculate a window of sequence numbers that we are allowed to use. With this I no longer overflow the chip's RX fifo and can do stable network transfers. | |
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84ddc006 | 2018-05-16 14:10:26 | After having finished transmitting the last mbuf, don't just return to the caller. Otherwise we skip restarting the ifq which means that if we ever have a full queue and go oactive, there is no coming back. So break out from the loop and call ifq restart if the queue is not full. | |
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029d6dd5 | 2018-05-16 08:20:00 | Implement a BCDC control packet mechanism based on the command request ids. So far we were only able to have one command in flight at a time and race conditions could easily lead to unexpected behaviour, especia- lly combined with a slow bus and timeouts. With this rework we send or enqueue a control packet command and wait for replies to happen. Thus we can have multiple control packets in flight and a reply with the correct id will wake us up. | |
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ebece86d | 2018-05-01 18:30:37 | Bump the clock frequency to a higher level that every card (per spec) has to support for MMC cards prior to reading the extended registers. We already do this for SD cards. Fixes eMMC support on the i.MX8M. Tested by and ok kettenis@ | |
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4b20f930 | 2018-03-30 07:18:39 | Add some sensible error checking in the hibernate io path, helpfully suggested by coverity (via daniel@) | |
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f3036462 | 2018-03-20 04:18:40 | Add hibernate IO path for sdmmc(4). This requires some help from the sdmmc chipset driver, currently only implemented in sdhc(4), but mostly uses the regular path. sdhc(4) also needed the ability to perform IO while cold. ok deraadt@ | |
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7b2b2895 | 2018-03-19 21:40:32 | Make it possible for the sdhc(4) attachment glue to specify the base clock frequency. ok patrick@, visa@ | |
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df10b811 | 2018-02-11 21:10:03 | Use the new APIs for setting block lengths and reading from/writing to memory regions. | |
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dae1f2db | 2018-02-11 20:58:40 | Add sdmmc_io_set_blocklen() which allows to set the block length of an SDIO function. This is necessary for some SDIO cards that need to be talked with using smaller block lengths than the maximum supported by the host controller. ok kettenis@ | |
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1f8b50cb | 2018-02-11 20:57:57 | Add sdmmc_io_read_region_1() and sdmmc_io_write_region_1() as an interface for "reading memory" akin to the bus_space(9) API. The already existing multi interface is used for "reading FIFOs". The technical difference is that one always reads from the same address (FIFO) while the other increments the address while reading (memory). ok kettenis@ | |
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8878a15e | 2018-02-11 05:13:07 | Since the BCDC header has a variable data offset, so the ethernet packet alignment can be variable, it's better to move taking care of alignment into the BCDC receive code. | |
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4ecea62e | 2018-02-11 05:07:36 | Update the packet header length as well as the mbuf length on receive. Did that everywhere else but missed it here. | |
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50b6cc81 | 2018-02-10 05:21:13 | fix build with SDHC_DEBUG defined, no binary change otherwise | |
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d2df058d | 2018-02-09 02:21:16 | Implement the bwfm(4) SDIO bus logic. This is the bus layer that converts the logic of the upper layers (sending control messages, sending data messages, receiving event or data messages) into the corresponding work that has to be done on the lowest layer. SDIO is not the fastest bus for exchanging network packets, but maybe there is room for tuning. Actual TX/RX is being done in a worker task that serializes access to the hardware. This is good enough to attach to WiFi networks and do network transfers. Developed and tested on a Cubox-i. | |
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709ff52b | 2018-02-07 22:08:24 | Outsource setting the backplane window into a specific function so it can be called and reused in different places. | |
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7f7fa296 | 2018-02-07 21:44:09 | Move SDIO bus and protocol definitions from the shared header into one header specific to the SDIO attachment driver. Also add more register and protocol definitions to it. | |
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b58329e9 | 2017-12-24 12:55:52 | Allow SD/MMC controller drivers to allocate their own DMA mapping structure to account for any relevant hardware constraints. ok stsp@ | |
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29206d63 | 2017-10-12 11:54:37 | Apparently one of the main concepts in the SDMMC I/O subsystem is that the driver attached to an SDIO card always holds the lock and only releases it once it detaches. Now with that in mind, some time ago sdmmc_io_function_disable() and sdmmc_io_function_ready() were changed to only assert the write lock and not take it, but not all of the tree was converted. Change sdmmc_io_function_enable() as well, and remove the enter/exit dance in the interrupt code. Apparently there is no SDIO driver yet/anymore which would trigger those issues. ok kettenis@ | |
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32b2494e | 2017-10-11 17:19:50 | Add bwfm(4), a driver for Broadcom FullMAC WiFi controllers. The FullMAC, in comparison to SoftMAC, does most WiFi handling in the firmware that's running on the controller. This means we have to work around the net80211 stack while still implementing all the WiFi interfaces to userland. This driver is still in early development. So far it can connect to open WiFis over the USB bus. SDIO and PCIe support, for devices like the Raspberry Pi 3 or the Macbooks, is not yet implemented. Also mbufs on the transmit path leak and are not yet freed. ok stsp@ | |
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96e82a06 | 2017-08-28 23:45:10 | Fix a memory leak in an error path. Coverity CID 1453042. ok visa@ | |
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c2deed7f | 2017-05-05 15:10:07 | Implement two quirks to support the Arasan eMMC 5.1 controller found on the Rockchip RK3399. - Make it possible to override sdhc_signal_voltage(). - Make it possible to disable double-data rate modes. ok patrick@ | |
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870d2ca8 | 2017-04-06 17:00:53 | Sizes for the remaining free() calls, and use mallocarray() ok visa | |
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6eea0e83 | 2017-04-06 07:07:28 | remove stray character in previous that broke the build | |
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87985770 | 2017-04-06 03:15:29 | add sizes to free() calls ok dhill | |
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8fda72b7 | 2017-01-21 05:42:03 | p_comm is the process's command and isn't per thread, so move it from struct proc to struct process. ok deraadt@ kettenis@ | |
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c4758de4 | 2017-01-20 00:52:32 | sdmmc sd(4) devices should be marked SID_REMOVABLE, so that eject(1) can succeed. No downside in the bottom part of the driver. ok dlg krw | |
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890df492 | 2016-09-11 10:22:16 | Get SDIO reset working. Tested and ok kettenis | |
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12393d97 | 2016-05-15 22:21:55 | Sync with the ADMA2 implementation in imxesdhc(4): Map the ADMA2 descriptor table use BUS_DMA_COHERENT and add a missing bus_dmamap_sync(9). Doesn't really fix anything, but adding the missing sync makes the code more correct. Using BUS_DMA_COHERENT avoids some cache flushes on architectures that implement it. | |
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f01bfc12 | 2016-05-12 15:26:42 | Remove bogus rw_exit() call. | |
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6ca10361 | 2016-05-05 20:40:48 | Bump up the clock to 25 MHz before trying to read the SCR register of an SD card. Data transfers don't seem to work on the Realtek RTS5229 Card Reader if the clock frequency is too low, and reading the SCR requires a data transfer. | |
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820e06f1 | 2016-05-05 11:01:08 | Add Dual Data Rate support for eMMC at 52MHz. | |
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ed7b9048 | 2016-05-05 10:51:10 | Populate SCSI inquiry data with information from SD and MMC cards. Code is slightly more convoluted to avoid using strncpy(9). ok jsg@, millert@, deraadt@ | |
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ac09bb43 | 2016-05-04 14:05:32 | Print SD host controller version. | |
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9ca7c972 | 2016-05-04 09:30:06 | Add high-speed support for SD cards. In theory this should double the transfer rates to and from the card. In practice the improvement will be smaller, but I am seeing serious improvement in the read speeds. |