Commit d25eff65058319d099617da320d0f1d4bd852c6b
2021-01-02T10:06:22
Fixed bug 5429 - spinlock implements PAUSE_INSTRUCTION for PPC platforms David Carlier This form of 'or' provides a hint that performance will probably be improved if shared resources dedicated to the executing processor are released for use by other processors
diff --git a/src/atomic/SDL_spinlock.c b/src/atomic/SDL_spinlock.c
index 73ddd01..1058801 100644
--- a/src/atomic/SDL_spinlock.c
+++ b/src/atomic/SDL_spinlock.c
@@ -140,6 +140,8 @@ SDL_AtomicTryLock(SDL_SpinLock *lock)
#define PAUSE_INSTRUCTION() __asm__ __volatile__("pause\n") /* Some assemblers can't do REP NOP, so go with PAUSE. */
#elif (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__)
#define PAUSE_INSTRUCTION() __asm__ __volatile__("yield" ::: "memory")
+#elif (defined(__powerpc__) || defined(__powerpc64__))
+ #define PAUSE_INSTRUCTION() __asm__ __volatile__("or 27,27,27");
#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
#define PAUSE_INSTRUCTION() _mm_pause() /* this is actually "rep nop" and not a SIMD instruction. No inline asm in MSVC x86-64! */
#elif defined(__WATCOMC__) && defined(__386__)