thodg/cgminer

diff --git a/driver-bitfury.c b/driver-bitfury.c
index 334aae3..bbde24b 100644
--- a/driver-bitfury.c
+++ b/driver-bitfury.c
@@ -292,81 +292,13 @@ static void nf1_close(struct cgpu_info *bitfury)
 	mcp2210_set_gpio_settings(bitfury, mcp);
 }
 
-/* Configuration registers - control oscillators and such stuff. PROGRAMMED when
- * magic number matches, UNPROGRAMMED (default) otherwise */
-static void nf1_config_reg(struct bitfury_info *info, int cfgreg, int ena)
-{
-	static const uint8_t enaconf[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
-	static const uint8_t disconf[4] = { 0, 0, 0, 0 };
-
-	if (ena)
-		spi_add_data(info, 0x7000 + cfgreg * 32, enaconf, 4);
-	else
-		spi_add_data(info, 0x7000 + cfgreg * 32, disconf, 4);
-}
-
-static void nf1_set_freq(struct bitfury_info *info)
-{
-	uint64_t freq;
-	const uint8_t *osc6 = (unsigned char *)&freq;
-
-	freq = (1ULL << info->osc6_bits) - 1ULL;
-	spi_add_data(info, 0x6000, osc6, 8); /* Program internal on-die slow oscillator frequency */
-}
-
-#define FIRST_BASE 61
-#define SECOND_BASE 4
-
-static void nf1_send_conf(struct bitfury_info *info)
-{
-	const int8_t nf1_counters[16] = { 64, 64, SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2,
-		SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1, (FIRST_BASE)%65, (FIRST_BASE+1)%65,
-		(FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65,
-		(FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65 };
-	int i;
-
-	for (i = 7; i <= 11; i++)
-		nf1_config_reg(info, i, 0);
-	nf1_config_reg(info, 6, 0); /* disable OUTSLK */
-	nf1_config_reg(info, 4, 1); /* Enable slow oscillator */
-	for (i = 1; i <= 3; ++i)
-		nf1_config_reg(info, i, 0);
-	/* Program counters correctly for rounds processing, here it should
-	 * start consuming power */
-	spi_add_data(info, 0x0100, nf1_counters, 16);
-}
-
-static void nf1_send_init(struct bitfury_info *info)
-{
-	/* Prepare internal buffers */
-	/* PREPARE BUFFERS (INITIAL PROGRAMMING) */
-	unsigned int w[16];
-	unsigned int atrvec[] = {
-		0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5, 0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1, /* MIDSTATE */
-		0,0,0,0,0,0,0,0,
-		0x8a0bb7b7, 0x33af304f, 0x0b290c1a, 0xf0c4e61f, /* WDATA: hashMerleRoot[7], nTime, nBits, nNonce */
-        };
-	ms3steps(atrvec);
-	memset(&w, 0, sizeof(w));
-	w[3] = 0xffffffff;
-	w[4] = 0x80000000;
-	w[15] = 0x00000280;
-	spi_add_data(info, 0x1000, w, 16 * 4);
-	spi_add_data(info, 0x1400, w, 8 * 4);
-	memset(w, 0, sizeof(w));
-	w[0] = 0x80000000;
-	w[7] = 0x100;
-	spi_add_data(info, 0x1900, w, 8 * 4); /* Prepare MS and W buffers! */
-	spi_add_data(info, 0x3000, atrvec, 19 * 4);
-}
-
 static bool nf1_reinit(struct cgpu_info *bitfury, struct bitfury_info *info)
 {
 	spi_clear_buf(info);
 	spi_add_break(info);
-	nf1_set_freq(info);
-	nf1_send_conf(info);
-	nf1_send_init(info);
+	spi_set_freq(info);
+	spi_send_conf(info);
+	spi_send_init(info);
 	return spi_txrx(bitfury, info);
 }
 
@@ -479,7 +411,7 @@ static bool nf1_detect_one(struct cgpu_info *bitfury, struct bitfury_info *info)
 	if (val != MCP2210_GPIO_PIN_LOW)
 		goto out;
 
-	info->osc6_bits = 50;
+	info->osc6_bits = 54;
 	ret = nf1_reinit(bitfury, info);
 	if (ret) {
 		if (!add_cgpu(bitfury))
@@ -994,7 +926,9 @@ static int64_t nf1_scan(struct thr_info *thr, struct cgpu_info *bitfury,
 	}
 	info->work = work;
 	bitfury_work_to_payload(&info->payload, work);
-	libbitfury_sendHashData(bitfury);
+	if (!libbitfury_sendHashData(bitfury))
+		return -1;
+
 	if (info->job_switched) {
 		int i, j;
 		unsigned int *res = info->results;
diff --git a/driver-bitfury.h b/driver-bitfury.h
index b60025f..6e6eef6 100644
--- a/driver-bitfury.h
+++ b/driver-bitfury.h
@@ -29,7 +29,7 @@ extern int opt_bxf_temp_target;
 #define NF1_PIN_SCK_OVR 5
 #define NF1_PIN_PWR_EN 6
 
-#define NF1_SPIBUF_SIZE 16384
+#define SPIBUF_SIZE 16384
 
 struct bitfury_payload {
 	unsigned char midstate[32];
@@ -77,7 +77,7 @@ struct bitfury_info {
 
 	/* NF1 specific data */
 	struct mcp_settings mcp;
-	char spibuf[NF1_SPIBUF_SIZE];
+	char spibuf[SPIBUF_SIZE];
 	unsigned int spibufsz;
 	int osc6_bits;
 	struct bitfury_payload payload;
diff --git a/libbitfury.c b/libbitfury.c
index d25bef9..06c6e62 100644
--- a/libbitfury.c
+++ b/libbitfury.c
@@ -10,6 +10,7 @@
  */
 
 #include "miner.h"
+#include "driver-bitfury.h"
 #include "libbitfury.h"
 #include "sha2.h"
 
@@ -148,6 +149,71 @@ void bitfury_work_to_payload(struct bitfury_payload *p, struct work *w)
 	applog(LOG_INFO, "INFO merkle[7]: %08x, ntime: %08x, nbits: %08x", p->m7, p->ntime, p->nbits);
 }
 
+/* Configuration registers - control oscillators and such stuff. PROGRAMMED when
+ * magic number matches, UNPROGRAMMED (default) otherwise */
+void spi_config_reg(struct bitfury_info *info, int cfgreg, int ena)
+{
+	static const uint8_t enaconf[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
+	static const uint8_t disconf[4] = { 0, 0, 0, 0 };
+
+	if (ena)
+		spi_add_data(info, 0x7000 + cfgreg * 32, enaconf, 4);
+	else
+		spi_add_data(info, 0x7000 + cfgreg * 32, disconf, 4);
+}
+
+void spi_set_freq(struct bitfury_info *info)
+{
+	uint64_t freq;
+	const uint8_t *osc6 = (unsigned char *)&freq;
+
+	freq = (1ULL << info->osc6_bits) - 1ULL;
+	spi_add_data(info, 0x6000, osc6, 8); /* Program internal on-die slow oscillator frequency */
+}
+
+#define FIRST_BASE 61
+#define SECOND_BASE 4
+
+void spi_send_conf(struct bitfury_info *info)
+{
+	const int8_t nf1_counters[16] = { 64, 64, SECOND_BASE, SECOND_BASE+4, SECOND_BASE+2,
+		SECOND_BASE+2+16, SECOND_BASE, SECOND_BASE+1, (FIRST_BASE)%65, (FIRST_BASE+1)%65,
+		(FIRST_BASE+3)%65, (FIRST_BASE+3+16)%65, (FIRST_BASE+4)%65, (FIRST_BASE+4+4)%65,
+		(FIRST_BASE+3+3)%65, (FIRST_BASE+3+1+3)%65 };
+	int i;
+
+	for (i = 7; i <= 11; i++)
+		spi_config_reg(info, i, 0);
+	spi_config_reg(info, 6, 0); /* disable OUTSLK */
+	spi_config_reg(info, 4, 1); /* Enable slow oscillator */
+	for (i = 1; i <= 3; ++i)
+		spi_config_reg(info, i, 0);
+	/* Program counters correctly for rounds processing, here it should
+	 * start consuming power */
+	spi_add_data(info, 0x0100, nf1_counters, 16);
+}
+
+void spi_send_init(struct bitfury_info *info)
+{
+	/* Prepare internal buffers */
+	/* PREPARE BUFFERS (INITIAL PROGRAMMING) */
+	unsigned int w[16];
+
+	ms3steps(atrvec);
+	ms3steps(&atrvec[20]);
+	ms3steps(&atrvec[40]);
+	memset(&w, 0, sizeof(w));
+	w[3] = 0xffffffff;
+	w[4] = 0x80000000;
+	w[15] = 0x00000280;
+	spi_add_data(info, 0x1000, w, 16 * 4);
+	spi_add_data(info, 0x1400, w, 8 * 4);
+	memset(w, 0, sizeof(w));
+	w[0] = 0x80000000;
+	w[7] = 0x100;
+	spi_add_data(info, 0x1900, w, 8 * 4); /* Prepare MS and W buffers! */
+	spi_add_data(info, 0x3000, atrvec, 19 * 4);
+}
 void spi_clear_buf(struct bitfury_info *info)
 {
 	info->spibufsz = 0;
@@ -155,7 +221,7 @@ void spi_clear_buf(struct bitfury_info *info)
 
 void spi_add_buf(struct bitfury_info *info, const void *buf, const int sz)
 {
-	if (unlikely(info->spibufsz + sz > NF1_SPIBUF_SIZE)) {
+	if (unlikely(info->spibufsz + sz > SPIBUF_SIZE)) {
 		applog(LOG_WARNING, "SPI bufsize overflow!");
 		return;
 	}
@@ -261,7 +327,7 @@ bool spi_txrx(struct cgpu_info *bitfury, struct bitfury_info *info)
 	return true;
 }
 
-void libbitfury_sendHashData(struct cgpu_info *bf)
+bool libbitfury_sendHashData(struct cgpu_info *bf)
 {
 	struct bitfury_info *info = bf->device_data;
 	static unsigned second_run;
@@ -277,7 +343,8 @@ void libbitfury_sendHashData(struct cgpu_info *bf)
 	spi_clear_buf(info);
 	spi_add_break(info);
 	spi_add_data(info, 0x3000, (void*)&atrvec[0], 19 * 4);
-	spi_txrx(bf, info);
+	if (!spi_txrx(bf, info))
+		return false;
 
 	memcpy(newbuf, info->spibuf + 4, 17 * 4);
 
@@ -312,4 +379,6 @@ void libbitfury_sendHashData(struct cgpu_info *bf)
 
 	cgsleep_ms(BITFURY_REFRESH_DELAY);
 	second_run = 1;
+
+	return true;
 }
diff --git a/libbitfury.h b/libbitfury.h
index 69adcae..4b460df 100644
--- a/libbitfury.h
+++ b/libbitfury.h
@@ -15,12 +15,15 @@
 void ms3steps(uint32_t *p);
 uint32_t decnonce(uint32_t in);
 void bitfury_work_to_payload(struct bitfury_payload *p, struct work *w);
+void spi_set_freq(struct bitfury_info *info);
+void spi_send_conf(struct bitfury_info *info);
+void spi_send_init(struct bitfury_info *info);
 void spi_clear_buf(struct bitfury_info *info);
 void spi_add_buf(struct bitfury_info *info, const void *buf, const int sz);
 void spi_add_break(struct bitfury_info *info);
 void spi_add_data(struct bitfury_info *info, uint16_t addr, const void *buf, int len);
 bool spi_reset(struct cgpu_info *bitfury, struct bitfury_info *info);
 bool spi_txrx(struct cgpu_info *bitfury, struct bitfury_info *info);
-void libbitfury_sendHashData(struct cgpu_info *bf);
+bool libbitfury_sendHashData(struct cgpu_info *bf);
 
 #endif /* LIBBITFURY_H */