Commit e88652bc56da73846f1287a1522ff5682619d83d

Kano 2013-03-29T21:33:57

BFL FPGA Windows timeout set to 999ms

1
2
3
4
5
6
7
8
9
10
11
12
13
diff --git a/usbutils.c b/usbutils.c
index 1c32461..3c69711 100644
--- a/usbutils.c
+++ b/usbutils.c
@@ -54,7 +54,7 @@
 
 #ifdef WIN32
 #define BFLSC_TIMEOUT_MS 500
-#define BITFORCE_TIMEOUT_MS 500
+#define BITFORCE_TIMEOUT_MS 999
 #define MODMINER_TIMEOUT_MS 200
 #define AVALON_TIMEOUT_MS 500
 #else