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c3ed5b52
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2018-03-11T11:11:05
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Website: Auto-generate example header with component title, list of aliases and dependencies.
`overrideExampleHeader` can be used to generate only the component title.
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795eb996
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2015-09-16T08:22:27
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Verilog: Rename to "Verilog", optimize string regexp, don't use captures unless needed
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1cf50060
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2015-07-12T16:41:33
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requested changes and personal modifications
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